Lars Sundström

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 11

Top Topics

Cmos Technology

Noise Suppression

Lagrange Interpolation

Top Venues

IEEE J. Solid State Circuits

IEEE Commun. Mag.

Publications

Mattias Palm, Daniele Mastantuono, Christer Jansson, Erik Backenius, Nikola Ivanisevic, Mikael Normark, Prakash Harikumar, My-Chien Yee, Andreas Leidenhed, Roland Strandberg, Sunny Sharma, Hanie Ghaedrahmati, Martin Anderson, Peter Nygren, Peter Sjögren, Erik Säll, Robert Hägglund, Lars Sundström
A 12/16 GSps Time-Interleaved Pipelined-SAR ADC with Temperature Robust Performance at 0.75V Supply in 7nm FinFET Technology. ESSCIRC (2023)
Staffan Ek, Patrik Karlsson, Andreas Kämpe, Roland Strandberg, Aravind Tharayil Narayanan, Martin Anderson, Hind Dafallah, Mesrop Daghbashyan, Tayebeh Ghanavati Nejad, Robert Hägglund, Nikola Ivanisevic, Robert Nilsson, Peter Nygren, Mattias Palm, Erik Säll, Sha Tao, My-Chien Yee, Lars Sundström
A Bang-Bang Digital PLL Covering 11.1-14.3 GHz and 14.7-18.7 GHz with sub-40 fs RMS Jitter in 7 nm FinFET Technology. ESSCIRC (2022)
Siyu Tan, Mattias Palm, Daniele Mastantuono, Roland Strandberg, Lars Sundström, Sven Mattisson, Pietro Andreani
A Design Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs. NorCAS (2020)
Siyu Tan, Daniele Mastantuono, Roland Strandberg, Lars Sundström, Pietro Andreani, Mattias Palm
A 10-Bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration. ISCAS (2020)
Siyu Tan, Lars Sundström, Mattias Palm, Sven Mattisson, Pietro Andreani
A 5 GHz CT $\Delta\sum$ ADC with 250 MHz Signal Bandwidth in 28 nm-FDSOI CMOS. NORCAS (2019)
Staffan Ek, Tony Påhlsson, Christian Elgaard, Anders Carlsson, Andreas Axholt, Anna-Karin Stenman, Lars Sundström, Henrik Sjöland
A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24-30-GHz Sliding-IF 5G Transceivers. IEEE J. Solid State Circuits 53 (7) (2018)
Mattias Palm, Daniele Mastantuono, Roland Strandberg, Lars Sundström, Sven Mattisson
A 12b, 1 GSps TI pipelined-SAR converter with 65 dB SFDR through buffer linearization and gain mismatch correction in 28nm FD-SOI. ESSCIRC (2017)
Christian Elgaard, Lars Sundström
A 491.52 MHz 840 uW crystal oscillator in 28 nm FD-SOI CMOS for 5G applications. ESSCIRC (2017)
Ali A. Zaidi, Robert Baldemair, Hugo M. Tullberg, Hakan Bjorkegren, Lars Sundström, Jonas Medbo, Caner Kilinc, Icaro Leonardo Da Silva
Waveform and Numerology to Support 5G Services and Requirements. IEEE Commun. Mag. 54 (11) (2016)
Xiaodong Liu, Anders Nejdel, Mattias Palm, Lars Sundström, Markus Törmänen, Henrik Sjöland, Pietro Andreani
A 65 nm CMOS Wideband Radio Receiver With ΔΣ-Based A/D-Converting Channel-Select Filters. IEEE J. Solid State Circuits 51 (7) (2016)
Anders Nejdel, Xiaodong Liu, Mattias Palm, Lars Sundström, Markus Törmänen, Henrik Sjöland, Pietro Andreani
A 0.6-3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filters. ESSCIRC (2015)
Mattias Andersson, Martin Anderson, Lars Sundström, Sven Mattisson, Pietro Andreani
A Filtering ΔΣ ADC for LTE and Beyond. IEEE J. Solid State Circuits 49 (7) (2014)
Dejan Radjen, Martin Anderson, Lars Sundström, Pietro Andreani
A low-power 2nd-order CT ΔΣ modulator with an asynchronous SAR quantizer. NORCHIP (2014)
Xiaodong Liu, Mattias Andersson, Martin Anderson, Lars Sundström, Pietro Andreani
An 11mW continuous time delta-Sigma modulator with 20 MHz bandwidth in 65nm CMOS. ISCAS (2014)
Lars Sundström, Staffan Ek, Jim Svensson, Martin Anderson, Roland Strandberg, Fenghao Mu, Imad ud Din, Thomas Olsson, Leif R. Wilhelmsson, Daniel Eckerbert
Complex IF Harmonic Rejection Mixer for Non-Contiguous Dual Carrier Reception in 65 nm CMOS. IEEE J. Solid State Circuits 48 (7) (2013)
Lars Sundström, Martin Anderson, Roland Strandberg, Staffan Ek, Jim Svensson, Fenghao Mu, Thomas Olsson, Imad ud Din, Leif R. Wilhelmsson, Daniel Eckerbert, Sven Mattisson
A receiver for LTE Rel-11 and beyond supporting non-contiguous carrier aggregation. ISSCC (2013)
Dejan Radjen, Pietro Andreani, Martin Anderson, Lars Sundström
A low-power 2nd-order CT ΔΣ modulator with a single operational amplifier. NORCHIP (2013)
Mattias Andersson, Martin Anderson, Lars Sundström, Sven Mattisson, Pietro Andreani
-order ΔΣ modulator noise suppression. ESSCIRC (2013)
Leif R. Wilhelmsson, Jim Svensson, Martin Anderson, Staffan Ek, Roland Strandberg, Lars Sundström
Design of a Configurable Complex IF Receiver Supporting LTE Carrier Aggregation. VTC Spring (2013)
Chester Sungchung Park, Lars Sundström, Anders Wallén, Ali S. Khayrallah
Carrier aggregation for LTE-advanced: design challenges of terminals. IEEE Commun. Mag. 51 (12) (2013)
Martin Anderson, Roland Strandberg, Staffan Ek, Leif R. Wilhelmsson, Lars Sundström, Mattias Andersson, Imad ud Din, Jim Svensson, Thomas Olsson, Daniel Eckerbert
A 4.75-34.75 MHz digitally tunable active-RC LPF for >60dB mean RX IRR in 65nm CMOS. ESSCIRC (2012)
Lars Sundström, Staffan Ek, Jim Svensson, Martin Anderson, Roland Strandberg, Fenghao Mu, Imad ud Din, Thomas Olsson, Leif R. Wilhelmsson, Daniel Eckerbert
Complex IF harmonic rejection mixer for non-contiguous dual carrier reception in 65 nm CMOS. ESSCIRC (2012)
Leif R. Wilhelmsson, Fenghao Mu, Lars Sundström
Simultaneous Reception and Scanning Using Complex IF Radio Architectures. VTC Fall (2011)
Magnus Nilsson, Sven Mattisson, Nikolaus Klemmer, Martin Anderson, Torkel Arnborg, Peter Caputa, Staffan Ek, Lin Fan, Henrik Fredriksson, Fabien Garrigues, Henrik Geis, Hans Hagberg, Joel Hedestig, Hu Huang, Yevgeniy Kagan, Niklas Karlsson, Henrik Kinzel, Thomas Mattsson, Thomas Mills, Fenghao Mu, Andreas Mårtensson, Lars Nicklasson, Filip Oredsson, Ufuk Ozdemir, Fitzgerald Sungkyung Park, Tony Pettersson, Tony Påhlsson, Markus Pålsson, Stephane Ramon, Magnus Sandgren, Per Sandrup, Anna-Karin Stenman, Roland Strandberg, Lars Sundström, Fredrik Tillman, Tobias Tired, Satish Uppathil, Joel Walukas, Eric Westesson, Xuhao Zhang, Pietro Andreani
A 9-band WCDMA/EDGE transceiver supporting HSPA evolution. ISSCC (2011)
Dejan Radjen, Pietro Andreani, Martin Anderson, Lars Sundström
A continuous time ΔΣ modulator with reduced clock jitter sensitivity through DSCR feedback. NORCHIP (2011)
Mattias Andersson, Martin Anderson, Pietro Andreani, Lars Sundström
Impact of MOS threshold-voltage mismatch in current-steering DACs for CT ΣΔ modulators. ISCAS (2010)
Martin Anderson, Lars Sundström
DT Modeling of Clock Phase-Noise Effects in LP CT DeltaSigma ADCs With RZ Feedback. IEEE Trans. Circuits Syst. II Express Briefs (7) (2009)
Martin Anderson, Lars Sundström
Design and Measurement of a CT ΔΣ ADC With Switched-Capacitor Switched-Resistor Feedback. IEEE J. Solid State Circuits 44 (2) (2009)
Martin Anderson, Lars Sundström
A 312-MHz CT Δ∑ modulator using a SC feedback DAC with reduced peak current. ESSCIRC (2007)
Bo Shi, Lars Sundström
A time-continuous optimization method for automatic adjustment of gain and phase imbalances in feedforward and LINC transmitters. ISCAS (1) (2003)
L. Durkalec, Lars Sundström, Thomas Mattsson
Properties of RF bandpass amplifier topology with Q-enhancing. ISCAS (1) (2002)
Roland Strandberg, Pietro Andreani, Lars Sundström
Bandwidth considerations for a CALLUM transmitter architecture. ISCAS (4) (2002)
Bo Shi, Lars Sundström
An IF CMOS signal component separator chip for LINC transmitters. CICC (2001)
Weiyun Shan, Lars Sundström, Bo Shi
Spectral sensitivity of predistortion linearizer architectures to filter ripple. VTC Fall (2001)
Bo Shi, Lars Sundström
Investigation of a highly efficient LINC amplifier topology. VTC Fall (2001)
Bo Shi, Lars Sundström
A novel design using translinear circuit for linear LINC transmitters. ISCAS (2000)
Lars Sundström
Spectral sensitivity of LINC transmitters to quadrature modulator misalignments. IEEE Trans. Veh. Technol. 49 (4) (2000)
Bo Shi, Lars Sundström
A 200-MHz IF BiCMOS signal component separator for linear LINC transmitters. IEEE J. Solid State Circuits 35 (7) (2000)
Eric Westesson, Lars Sundström
A complex polynomial predistorter chip in CMOS for baseband or IF linearization of RF power amplifiers. ISCAS (1) (1999)
Pietro Andreani, Lars Sundström, Niklas Karlsson, M. Svensson
A chip for linearization of RF power amplifiers using digital predistortion with a bit-parallel complex multiplier. ISCAS (1) (1999)
Bo Shi, Lars Sundström
Design and implementation of a CMOS power feedback linearization IC for RF power amplifiers. ISCAS (2) (1999)
Anna-Karin Stenman, Lars Sundström
Extended analysis of input impedance control of an NMOS-transistor with an inductive series feedback. ICECS (1999)