A 0.6-3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filters.
Anders NejdelXiaodong LiuMattias PalmLars SundströmMarkus TörmänenHenrik SjölandPietro AndreaniPublished in: ESSCIRC (2015)
Keyphrases
- physical layer
- high speed
- wireless communication
- channel estimation
- silicon on insulator
- power consumption
- cmos technology
- multi channel
- amplitude modulation
- fading channels
- impulse response
- multipath
- nm technology
- wireless systems
- wireless channels
- code division multiple access
- multiple input multiple output
- decision feedback
- metal oxide semiconductor
- false alarm probability
- low power
- low cost
- communication systems
- ofdm system
- received signal
- analog vlsi
- antenna array
- bit error rate