Jize Jiang

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 8

Top Topics

Top Venues

IEEE J. Solid State Circuits

Publications

Xinyu Pi, Mingyuan Wu, Jize Jiang, Haozhen Zheng, Beitong Tian, Chengxiang Zhai, Klara Nahrstedt, Zhiting Hu
UOUO: Uncontextualized Uncommon Objects for Measuring Knowledge Horizons of Vision Language Models. CoRR (2024)
Ziyi Chen, Heyi Tao, Daqian Zuo, Jize Jiang, Jun Yang, Yuxiang Wei
Efficient Title Reranker for Fast and Improved Knowledge-Intense NLP. CoRR (2023)
Adam Davies, Jize Jiang, ChengXiang Zhai
Competence-Based Analysis of Language Models. CoRR (2023)
Wei Shu, Jize Jiang, Kwen-Siong Chong, Joseph Sylvester Chang
Radiation Hardening By Design Integrated Circuits Enabling Low-Cost Satellites for Internet-of-Things. DSL (2018)
Jize Jiang, Wei Shu, Joseph S. Chang
A 65-nm CMOS Low Dropout Regulator Featuring >60-dB PSRR Over 10-MHz Frequency Range and 100-mA Load Current Range. IEEE J. Solid State Circuits 53 (8) (2018)
Jize Jiang, Wei Shu, Joseph S. Chang
A 5.6 ppm/°C Temperature Coefficient, 87-dB PSRR, Sub-1-V Voltage Reference in 65-nm CMOS Exploiting the Zero-Temperature-Coefficient Point. IEEE J. Solid State Circuits 52 (3) (2017)
Tong Lin, Kwen-Siong Chong, Wei Shu, Ne Kyaw Zwa Lwin, Jize Jiang, Joseph S. Chang
Experimental investigation into radiation-hardening-by-design (RHBD) flip-flop designs in a 65nm CMOS process. ISCAS (2016)
Jize Jiang, Wei Shu, Kwen-Siong Chong, Tong Lin, Ne Kyaw Zwa Lwin, Joseph Sylvester Chang, Jingyuan Liu
Total Ionizing Dose (TID) effects on finger transistors in a 65nm CMOS process. ISCAS (2016)
Jize Jiang, Wei Shu, Joseph Sylvester Chang, Jingyuan Liu
A novel subthreshold voltage reference featuring 17ppm/°C TC within -40°C to 125°C and 75dB PSRR. ISCAS (2015)
Joseph S. Chang, Kwen-Siong Chong, Wei Shu, Tong Lin, Jize Jiang, Ne Kyaw Zwa Lwin, Yang Kang
Radiation-hardened library cell template and its total ionizing dose (TID) delay characterization in 65nm CMOS process. MWSCAS (2014)