Jinming Lu

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 21

Top Topics

Hardware Architecture

Floating Point Arithmetic

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Jinming Lu, Hui Wang, Jun Lin, Zhongfeng Wang
WinTA: An Efficient Reconfigurable CNN Training Accelerator With Decomposition Winograd. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (2) (2024)
Mingming Zhang, Liu Jie, Jinming Lu
Data Analysis for Machine Sound Detection: Challenges, Methods, and Future Trends. CISP-BMEI (2023)
Jinming Lu, Ewald A. Werner
Cathode Shape Design for Steady-State Electrochemical Machining. Algorithms 16 (2) (2023)
Hui Wang, Jinming Lu, Jun Lin, Zhongfeng Wang
An FPGA-Based Reconfigurable CNN Training Accelerator Using Decomposable Winograd. ISVLSI (2023)
Haikuo Shao, Jinming Lu, Meiqi Wang, Zhongfeng Wang
An Efficient Training Accelerator for Transformers With Hardware-Algorithm Co-Optimization. IEEE Trans. Very Large Scale Integr. Syst. 31 (11) (2023)
Jinming Lu, Chao Ni, Zhongfeng Wang
ETA: An Efficient Training Accelerator for DNNs Based on Hardware-Algorithm Co-Optimization. IEEE Trans. Neural Networks Learn. Syst. 34 (10) (2023)
Jian Huang, Jinming Lu, Zhongfeng Wang
An Efficient Hardware Architecture for DNN Training by Exploiting Triple Sparsity. ISCAS (2022)
Jinming Lu, Jian Huang, Zhongfeng Wang
THETA: A High-Efficiency Training Accelerator for DNNs With Triple-Side Sparsity Exploration. IEEE Trans. Very Large Scale Integr. Syst. 30 (8) (2022)
Mingyang Xu, Jinming Lu, Zhongfeng Wang, Jun Lin
An Efficient CNN Training Accelerator Leveraging Transposable Block Sparsity. AICAS (2022)
Haikuo Shao, Jinming Lu, Jun Lin, Zhongfeng Wang
An FPGA-Based Reconfigurable Accelerator for Low-Bit DNN Training. ISVLSI (2021)
Jinming Lu, Chao Fang, Mingyang Xu, Jun Lin, Zhongfeng Wang
Evaluations on Deep Neural Networks Training Using Posit Number System. IEEE Trans. Computers 70 (2) (2021)
Tongtong Yin, Wendong Mao, Jinming Lu, Zhongfeng Wang
A Reconfigurable Accelerator for Generative Adversarial Network Training Based on FPGA. ISVLSI (2021)
Chao Ni, Jinming Lu, Jun Lin, Zhongfeng Wang
LBFP: Logarithmic Block Floating Point Arithmetic for Deep Neural Networks. APCCAS (2020)
Jinming Lu, Jun Lin, Zhongfeng Wang
A Reconfigurable DNN Training Accelerator on FPGA. SiPS (2020)
Jinming Lu, Siyuan Lu, Zhisheng Wang, Chao Fang, Jun Lin, Zhongfeng Wang, Li Du
Training Deep Neural Networks Using Posit Number System. CoRR (2019)
Jinming Lu, Siyuan Lu, Zhisheng Wang, Chao Fang, Jun Lin, Zhongfeng Wang, Li Du
Training Deep Neural Networks Using Posit Number System. SoCC (2019)
Meiqi Wang, Zhisheng Wang, Jinming Lu, Jun Lin, Zhongfeng Wang
E-LSTM: An Efficient Hardware Architecture for Long Short-Term Memory. IEEE J. Emerg. Sel. Topics Circuits Syst. 9 (2) (2019)
Siyuan Lu, Jinming Lu, Jun Lin, Zhongfeng Wang, Li Du
A Low-Latency and Low-Complexity Hardware Architecture for CTC Beam Search Decoding. SiPS (2019)
Siyuan Lu, Jinming Lu, Jun Lin, Zhongfeng Wang
A Hardware-Oriented and Memory-Efficient Method for CTC Decoding. IEEE Access 7 (2019)
Siyuan Lu, Jinming Lu, Jun Lin, Zhongfeng Wang
A Hardware-Oriented and Memory-Efficient Method for CTC Decoding. CoRR (2019)
Jianwei Feng, Junsheng Dai, Jinming Lu, Xizhe Li
Quantitative Prediction of 3-D Multiple Parameters of Tectonic Fractures in Tight Sandstone Reservoirs Based on Geomechanical Method. IEEE Access 6 (2018)