Jin-Yi Lin

Publication Activity (10 Years)

Years Active: 2011-2023
Publications (10 Years): 12

Top Topics

Analog To Digital Converter

Cmos Image Sensor

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Jin-Yi Lin, Yan-Ren Ban, Ching-Ting Hsu, Wei Hua Ho, Pao-Hung Chung
A Weightlifting Clean and Jerk Team Formation Model by Considering Barbell Trajectory and LSTM Neural Network. HCI (41) (2023)
Ming-Che Chen, Hsin-Hsu Chou, Hsiag-Chun Chen, Jin-Yi Lin, Ren-Guei Hsu, Jia-Xiang Chen, Yu-Tse Lee, Jung-Yao Zhuo, Wan-Jung Chang, Yang-Kun Ou
iCAPD: A Deep Learning-Based Monitoring System for Continuous Ambulatory Peritoneal Dialysis. ICCE-Taiwan (2023)
Jin-Yi Lin, Shu-Yen Lin
Temperature-Prediction Based Rate-Adjusted Time and Space Mapping Algorithm for 3D CNN Accelerator Systems. IEEE Trans. Computers 72 (10) (2023)
Shu-Yen Lin, Jin-Yi Lin
Dynamic Thermal-Aware Inter-Layer Perpendicular Downward Mapping for Three-Dimensional Convolutional Neural Network Accelerator. GCCE (2019)
Jin-Yi Lin, Chih-Cheng Hsieh
A 0.3 V 10-bit SAR ADC With First 2-bit Guess in 90-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2017)
Shu-Yen Lin, Jin-Yi Lin
Thermal- and Performance-Aware Address Mapping for the Multi-Channel Three-Dimensional DRAM Systems. IEEE Access 5 (2017)
Shu-Yen Lin, Jin-Yi Lin, Cheng-Hung Lin
A reconfigurable near-data systolic array accelerator for the three-dimensional DRAM systems. GCCE (2016)
Hung-Wen Lin, Jin-Yi Lin
A passband lock loop circuit system for band pass filter. ISOCC (2016)
Pei-Chen Lee, Jin-Yi Lin, Chih-Cheng Hsieh
A 0.4 V 1.94 fJ/conversion-step 10 bit 750 kS/s SAR ADC with Input-Range-Adaptive Switching. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2016)
Jin-Yi Lin, Kwuang-Han Chang, Chen-Che Kao, Shih-Chin Lo, Yan-Jiun Chen, Pei-Chen Lee, Chi-Hui Chen, Chin Yin, Chih-Cheng Hsieh
An 8-bit column-shared SAR ADC for CMOS image sensor applications. ISCAS (2015)
Jin-Yi Lin, Chih-Cheng Hsieh
A 0.3 V 10-bit 1.17 f SAR ADC With Merge and Split Switching in 90 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2015)
Shu-Yen Lin, Jin-Yi Lin, Kai-Wei Chang, Cheng-Hung Huang
Real-time data compression for thermal-controlled three-dimensional DRAM systems. GCCE (2015)
Shu-Yen Lin, Jin-Yi Lin
Thermal-aware architecture and mapping for multi-channel three-dimensional DRAM systems. GCCE (2014)
Hung-Wen Lin, Jin-Yi Lin, Min-Tai Chuang
A low-area digitalized channel selection filter for DSRC system. VLSI-DAT (2014)
Hsin-Yuan Huang, Jin-Yi Lin, Chih-Cheng Hsieh, Wen-Hsu Chang, Hann-Huei Tsai, Chin-Fong Chiu
A 9.2b 47fJ/conversion-step asynchronous SAR ADC with input range prediction DAC switching. ISCAS (2012)
Shang-Fu Yeh, Jin-Yi Lin, Chih-Cheng Hsieh, Ka-Yi Yeh, Chung-Chi Jim Li
A new CMOS image sensor readout structure for 3D integrated imagers. CICC (2011)
Yin-Tien Wang, Shi-Hao Wang, Ying-Chieh Feng, Jin-Yi Lin
Robot Pose and Velocity Estimation Using a Binocular Vision. FIRA (2011)