Jianhua Li

Publication Activity (10 Years)

Years Active: 2010-2024
Publications (10 Years): 7

Top Topics

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Computers

Microelectron. J.

Publications

Yiming Ouyang, Yihe Zhang, Huaguo Liang, Jianhua Li
A tree-recursive partitioned multicast mechanism for NoC-based deep neural network accelerator. Microelectron. J. 147 (2024)
Yiming Ouyang, Chenglong Sun, Ruifeng Li, Qi Wang, Jianhua Li
Transit ring: bubble flow control for eliminating inter-ring communication congestion. J. Supercomput. 79 (2) (2023)
Wu Zhou, Yiming Ouyang, Jianhua Li, Dongyu Xu
A transparent virtual channel power gating method for on-chip network routers. Integr. 88 (2023)
Yu Gu, Xiang Zhang, Yantong Wang, Meng Wang, Huan Yan, Yusheng Ji, Zhi Liu, Jianhua Li, Mianxiong Dong
WiGRUNT: WiFi-Enabled Gesture Recognition Using Dual-Attention Network. IEEE Trans. Hum. Mach. Syst. 52 (4) (2022)
Hu Wan, Fuyang Li, Zimeng Zhou, Kaisheng Zeng, Jianhua Li, Chun Jason Xue
NVLH: Crash-Consistent Linear Hashing for Non-Volatile Memory. NVMSA (2018)
Jianhua Li, Minming Li, Chun Jason Xue, Yiming Ouyang, Fanfan Shen
Thread Criticality Assisted Replication and Migration for Chip Multiprocessor Caches. IEEE Trans. Computers 66 (10) (2017)
Qing'an Li, Yanxiang He, Jianhua Li, Liang Shi, Yiran Chen, Chun Jason Xue
Compiler-Assisted Refresh Minimization for Volatile STT-RAM Cache. IEEE Trans. Computers 64 (8) (2015)
Jianhua Li, Liang Shi, Chun Jason Xue, Yinlong Xu
Dual partitioning multicasting for high-performance on-chip networks. J. Parallel Distributed Comput. 74 (1) (2014)
Liang Shi, Jianhua Li, Qing'an Li, Chun Jason Xue, Chengmo Yang, Xuehai Zhou
A Unified Write Buffer Cache Management Scheme for Flash Memory. IEEE Trans. Very Large Scale Integr. Syst. 22 (12) (2014)
Jianhua Li, Liang Shi, Qing'an Li, Chun Jason Xue, Yinlong Xu
Thread Progress Aware Coherence Adaption for Hybrid Cache Coherence Protocols. IEEE Trans. Parallel Distributed Syst. 25 (10) (2014)
Yazhi Huang, Liang Shi, Jianhua Li, Qing'an Li, Chun Jason Xue
WCET-Aware Re-Scheduling Register Allocation for Real-Time Embedded Systems With Clustered VLIW Architecture. IEEE Trans. Very Large Scale Integr. Syst. 22 (1) (2014)
Qing'an Li, Jianhua Li, Liang Shi, Mengying Zhao, Chun Jason Xue, Yanxiang He
Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 22 (8) (2014)
Liang Shi, Jianhua Li, Chun Jason Xue, Xuehai Zhou
Cooperating Virtual Memory and Write Buffer Management for Flash-Based Storage Systems. IEEE Trans. Very Large Scale Integr. Syst. 21 (4) (2013)
Qing'an Li, Jianhua Li, Liang Shi, Chun Jason Xue, Yiran Chen, Yanxiang He
Compiler-assisted refresh minimization for volatile STT-RAM cache. ASP-DAC (2013)
Wanyong Tian, Yingchao Zhao, Liang Shi, Qing'an Li, Jianhua Li, Chun Jason Xue, Minming Li, Enhong Chen
Task Allocation on Nonvolatile-Memory-Based Hybrid Main Memory. IEEE Trans. Very Large Scale Integr. Syst. 21 (7) (2013)
Jianhua Li, Liang Shi, Qing'an Li, Chun Jason Xue, Yiran Chen, Yinlong Xu, Wei Wang
Low-energy volatile STT-RAM cache design using cache-coherence-enabled adaptive refresh. ACM Trans. Design Autom. Electr. Syst. 19 (1) (2013)
Jianhua Li, Liang Shi, Qing'an Li, Chun Jason Xue, Yiran Chen, Yinlong Xu
Cache coherence enabled adaptive refresh for volatile STT-RAM. DATE (2013)
Liang Shi, Jianhua Li, Chun Jason Xue, Xuehai Zhou
Hybrid nonvolatile disk cache for energy-efficient and high-performance systems. ACM Trans. Design Autom. Electr. Syst. 18 (1) (2012)
Qing'an Li, Liang Shi, Jianhua Li, Chun Jason Xue, Yanxiang He
Code Motion for Migration Minimization in STT-RAM Based Hybrid Cache. ISVLSI (2012)
Qing'an Li, Jianhua Li, Liang Shi, Chun Jason Xue, Yanxiang He
MAC: migration-aware compilation for STT-RAM based hybrid cache in embedded systems. ISLPED (2012)
Jianhua Li, Liang Shi, Qing'an Li, Chun Jason Xue, Yinlong Xu
TEACA: Thread ProgrEss Aware Coherence Adaption for hybrid coherence protocols. ESTIMedia (2012)
Jianhua Li, Chun Jason Xue, Yinlong Xu
STT-RAM based energy-efficiency hybrid cache for CMPs. VLSI-SoC (2011)
Jianhua Li, Liang Shi, Chun Jason Xue, Chengmo Yang, Yinlong Xu
Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache. ESTIMedia (2011)
Wanyong Tian, Jianhua Li, Yingchao Zhao, Chun Jason Xue, Minming Li, Enhong Chen
Optimal task allocation on non-volatile memory based hybrid main memory. RACS (2011)
Liang Shi, Jianhua Li, Chun Jason Xue, Chengmo Yang, Xuehai Zhou
ExLRU: a unified write buffer cache management for flash memory. EMSOFT (2011)
Jianhua Li, Chun Jason Xue, Yinlong Xu
LADPM: Latency-Aware Dual-Partition Multicast Routing for Mesh-Based Network-on-Chips. ICPADS (2010)