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Jianan Mu
ORCID
Publication Activity (10 Years)
Years Active: 2022-2024
Publications (10 Years): 6
Top Topics
Malicious Attacks
Design Process
Cost Efficient
Programmable Logic
Top Venues
ETS
CoRR
ATS
ASP-DAC
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Publications
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Husheng Han
,
Xinyao Zheng
,
Yuanbo Wen
,
Yifan Hao
,
Erhu Feng
,
Ling Liang
,
Jianan Mu
,
Xiaqing Li
,
TianYun Ma
,
Pengwei Jin
,
Xinkai Song
,
Zidong Du
,
Qi Guo
,
Xing Hu
TensorTEE: Unifying Heterogeneous TEE Granularity for Efficient Secure Collaborative Tensor Computing.
CoRR
(2024)
Chaofang Ma
,
Jianan Mu
,
Jing Ye
,
Shuai Chen
,
Yuan Cao
,
Huawei Li
,
Xiaowei Li
Online Reliability Evaluation Design: Select Reliable CRPs for Arbiter PUF and Its Variants.
ETS
(2023)
Jianan Mu
,
Huajie Tan
,
Shuai Chen
,
Min Cai
,
Jing Ye
,
Huawei Li
,
Xiaowei Li
Configurable and High-Level Pipelined Lattice-Based Post Quantum Cryptography Hardware Accelerator Design.
ATS
(2023)
Jianan Mu
,
Huajie Tan
,
Jiawen Wu
,
Haotian Lu
,
Chip-Hong Chang
,
Shuai Chen
,
Shengwen Liang
,
Jing Ye
,
Huawei Li
,
Xiaowei Li
Energy-efficient NTT Design with One-bank SRAM and 2-D PE Array.
DATE
(2023)
Jianan Mu
,
Yi Ren
,
Wen Wang
,
Yizhong Hu
,
Shuai Chen
,
Chip-Hong Chang
,
Junfeng Fan
,
Jing Ye
,
Yuan Cao
,
Huawei Li
,
Xiaowei Li
Scalable and Conflict-Free NTT Hardware Accelerator Design: Methodology, Proof, and Implementation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
42 (5) (2023)
Jianan Mu
,
Yixuan Zhao
,
Zongyue Wang
,
Jing Ye
,
Junfeng Fan
,
Shuai Chen
,
Huawei Li
,
Xiaowei Li
,
Yuan Cao
A Voltage Template Attack on the Modular Polynomial Subtraction in Kyber.
ASP-DAC
(2022)