Jiajia Chen

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 29

Top Topics

Discrete Cosine Transform

Image Fusion Algorithm

Gpu Implementation

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Shouman Wang, Jiajia Chen
A New Input Grouping and Sharing Method to Design Low Complexity FFT Implementation. IEEE Trans. Circuits Syst. II Express Briefs 71 (2) (2024)
Fei Xie, Shumin Liu, Jiajia Chen
A new adaptive window-based guided filtering and interpolation for polarization image demosaicing. IET Image Process. 17 (7) (2023)
Yuheng Jiang, Jiajia Chen
A New Algorithm to Derive High Performance and Low Hardware Cost DCT for HEVC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (12) (2022)
Yingxiang Sun, Samith Abeywickrama, Lahiru Jayasinghe, Chau Yuen, Jiajia Chen, Meng Zhang
Micro-Doppler Signature-Based Detection, Classification, and Localization of Small UAV With Long Short-Term Memory Neural Network. IEEE Trans. Geosci. Remote. Sens. 59 (8) (2021)
ShuMin Liu, Jiajia Chen, Yuan Xun, Xiaojin Zhao, Chip-Hong Chang
A New Polarization Image Demosaicking Algorithm by Exploiting Inter-Channel Correlations With Guided Filtering. IEEE Trans. Image Process. 29 (2020)
Boyu Qin, Jiajia Chen
A New Al gorithm to Derive Hardware Efficient Integer Discrete Cosine Transform for HEVC. APSIPA (2020)
ShuMin Liu, Jiajia Chen, Ye Ai, Susanto Rahardja
An Optimized Quantization Constraints Set for Image Restoration and its GPU Implementation. IEEE Trans. Image Process. 29 (2020)
ShuMin Liu, Jiajia Chen, Susanto Rahardja
A New Multi-Focus Image Fusion Algorithm and Its Efficient Implementation. IEEE Trans. Circuits Syst. Video Technol. 30 (5) (2020)
Xueyu Han, Jiajia Chen, Boyu Qin, Susanto Rahardja
A Novel Area-Power Efficient Design for Approximated Small-Point FFT Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Gelei Deng, Jiajia Chen, Jiaxuan Zhang, Chip-Hong Chang
Area- and Power-Efficient Nearly-Linear Phase Response IIR Filter by Iterative Convex Optimization. IEEE Access 7 (2019)
Jiajia Chen, Yujia Wang, Juan Zhao, Susanto Rahardja
A new area and power efficient DCT circuits using sporadic logarithmic shifters. IEICE Electron. Express 16 (14) (2019)
Jiajia Chen, ShuMin Liu, Gelei Deng, Susanto Rahardja
Hardware Efficient Integer Discrete Cosine Transform for Efficient Image/Video Compression. IEEE Access 7 (2019)
Yingxiang Sun, Jiajia Chen, Chau Yuen, Susanto Rahardja
Indoor Sound Source Localization With Probabilistic Neural Network. IEEE Trans. Ind. Electron. 65 (8) (2018)
Yingxiang Sun, Hua Fu, Samith Abeywickrama, Lahiru Jayasinghe, Chau Yuen, Jiajia Chen
Drone Classification and Localization Using Micro-Doppler Signature with Low-Frequency Signal. ICCS (2018)
Jiajia Chen, Chip-Hong Chang, Yujia Wang, Juan Zhao, Susanto Rahardja
New Hardware and Power Efficient Sporadic Logarithmic Shifters for DSP Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (4) (2018)
ShuMin Liu, Jiajia Chen, Chip-Hong Chang, Ye Ai
A New Accurate and Fast Homography Computation Algorithm for Sports and Traffic Video Analysis. IEEE Trans. Circuits Syst. Video Technol. 28 (10) (2018)
Jiajia Chen, Chip-Hong Chang, Jiatao Ding, Rui Qiao, Mathias Faust
Tap Delay-and-Accumulate Cost Aware Coefficient Synthesis Algorithm for the Design of Area-Power Efficient FIR Filters. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2018)
Jiajia Chen, Jinghong Tan, Chip-Hong Chang, Feng Feng
A New Cost-Aware Sensitivity-Driven Algorithm for the Design of FIR Filters. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2017)
Yingxiang Sun, Jiajia Chen, Chau Yuen, Susanto Rahardja
Indoor Sound Source Localization with Probabilistic Neural Network. CoRR (2017)
ShuMin Liu, Jiaxuan Zhang, Jiajia Chen
Multi-focus image fusion using Gaussian filter and dynamic programming. APSIPA (2017)
Feng Feng, Jiajia Chen, Chip-Hong Chang
Hypergraph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2016)
Jinghong Tan, Jiajia Chen
Low complexity and quasi-linear phase IIR filters design based on iterative convex optimization. APCCAS (2016)
Juan Zhao, Yujia Wang, Jiajia Chen, Feng Feng
A new area-efficient FIR filter design algorithm by dynamic programming. EUSIPCO (2016)
ShuMin Liu, Jiajia Chen
A fast multi-focus image fusion algorithm by DWT and focused region decision map. APSIPA (2016)
Jiatao Ding, Jiajia Chen, Chip-Hong Chang
A New Paradigm of Common Subexpression Elimination by Unification of Addition and Subtraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (10) (2016)
Jiajia Chen, Jiatao Ding
New algorithm for design of low complexity twiddle factor multipliers in radix-2 FFT. ISCAS (2015)
Weiao Ding, Jiajia Chen
Design of low complexity programmable FIR filters using multiplexers array optimization. ISCAS (2015)
Jiajia Chen, Chip-Hong Chang, Feng Feng, Weiao Ding, Jiatao Ding
Novel Design Algorithm for Low Complexity Programmable FIR Filters Based on Extended Double Base Number System. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2015)
Yujia Wang, Jiajia Chen
New design for low complexity and low power partial programmable shifters. ASICON (2015)
Jiajia Chen, Chip-Hong Chang
Design of programmable FIR filters using Canonical Double Based Number Representation. ISCAS (2014)
Jiajia Chen, Weiao Ding, Juan Helen Zhou
Design of hardware efficient modulated filter bank for EEG signals feature extraction. MWSCAS (2014)
Jiajia Chen, Chip-Hong Chang, Ching-Chuen Jong
Time-multiplexed Data Flow Graph for the Design of Configurable Multiplier Block. ISCAS (2009)
Jiajia Chen, Chip-Hong Chang
High-Level Synthesis Algorithm for the Design of Reconfigurable Constant Multiplier. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (12) (2009)
Jiajia Chen, Chip-Hong Chang, Hanhua Qian
New Power Index Model for Switching Power Analysis from Adder Graph of FIR filter. ISCAS (2009)
Chip-Hong Chang, Jiajia Chen, Achutavarrier Prasad Vinod
Information Theoretic Approach to Complexity Reduction of FIR Filter Design. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2008)
Jiajia Chen, Chip-Hong Chang, A. Prasad Vinod
Design of High-speed, Low-power FIR Filters with Fine-grained Cost Metrics. APCCAS (2006)
Chip-Hong Chang, Jiajia Chen, A. Prasad Vinod
Maximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design. ISCAS (2006)
Uwe Meyer-Bäse, Jiajia Chen, Chip-Hong Chang, Andrew G. Dempster
A Comparison of Pipelined RAG-n and DA FPGA-based Multiplierless Filters. APCCAS (2006)