Je-Ching Liu

Publication Activity (10 Years)

Years Active: 2010-2010
Publications (10 Years): 0

Publications

Jinn-Shyan Wang, Chun-Yuan Cheng, Je-Ching Liu, Yu-Chia Liu, Yi-Ming Wang
A Duty-Cycle-Distortion-Tolerant Half-Delay-Line Low-Power Fast-Lock-in All-Digital Delay-Locked Loop. IEEE J. Solid State Circuits 45 (5) (2010)
Jinn-Shyan Wang, Chun-Yuan Cheng, Je-Ching Liu, Yu-Chia Liu, Yi-Ming Wang
A 55nm 1GHz one-cycle-locking de-skewing circuit. ISCAS (2010)