A 55nm 1GHz one-cycle-locking de-skewing circuit.
Jinn-Shyan WangChun-Yuan ChengJe-Ching LiuYu-Chia LiuYi-Ming WangPublished in: ISCAS (2010)
Keyphrases
- clock gating
- high speed
- power consumption
- cmos technology
- power reduction
- low power
- silicon on insulator
- power dissipation
- concurrency control
- circuit design
- electronic circuits
- analog circuits
- power saving
- fine granularity
- analog vlsi
- neural network
- digital circuits
- nm technology
- information gain
- low voltage
- database systems
- dual band
- logic circuits
- feature selection
- fpga device
- data objects
- image sensor