Jan Heisswolf

Publication Activity (10 Years)

Years Active: 2011-2017
Publications (10 Years): 3

Top Topics

Parallel Architectures

Resource Management

Top Venues

IPDPS Workshops

ACM Trans. Reconfigurable Technol. Syst.

Publications

Aurang Zaib, Thomas Wild, Andreas Herkersdorf, Jan Heisswolf, Jürgen Becker, Andreas Weichslgartner, Jürgen Teich
Efficient task spawning for shared memory and message passing in many-core architectures. J. Syst. Archit. 77 (2017)
Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Stephanie Friederich, Leonard Masing, Carsten Stein, Marco Duden, Roman Klopfer, Jürgen Teich, Thomas Wild, Andreas Herkersdorf, Jürgen Becker
Fault-tolerant communication in invasive networks on chip. AHS (2015)
Michael Dreschmann, Jan Heisswolf, Michael Geiger, Manuel Haußecker, Jürgen Becker
A Framework for Multi-FPGA Interconnection using Multi Gigabit Transceivers. SBCCI (2015)
Stephanie Friederich, Jan Heisswolf, Jürgen Becker
Hardware/software debugging of large scale many-core architectures. SBCCI (2014)
Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Martin Karle, Maximilian Singh, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure. ARCS Workshops (2014)
Jan Heisswolf, Aurang Zaib, Andreas Zwinkau, Sebastian Kobbe, Andreas Weichslgartner, Jürgen Teich, Jörg Henkel, Gregor Snelting, Andreas Herkersdorf, Jürgen Becker
CAP: Communication Aware Programming. DAC (2014)
Jan Heisswolf, Maximilian Singh, Martin Kupper, Ralf König, Jürgen Becker
Rerouting: Scalable NoC self-optimization by distributed hardware-based connection reallocation. ReConFig (2013)
Cuong Pham-Quoc, Jan Heisswolf, Stephan Werner, Zaid Al-Ars, Jürgen Becker, Koen Bertels
Hybrid interconnect design for heterogeneous hardware accelerators. DATE (2013)
Jan Heisswolf, Simon Bischof, Michael Rückauer, Jürgen Becker
Efficient memory access in 2D Mesh NoC architectures using high bandwidth routers. SBCCI (2013)
Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
Virtual networks - distributed communication resource management. ACM Trans. Reconfigurable Technol. Syst. 6 (2) (2013)
Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf
AUTO-GS: Self-Optimization of NoC Traffic through Hardware Managed Virtual Connections. DSD (2013)
Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Ralf König, Thomas Wild, Andreas Herkersdorf, Jürgen Teich, Jürgen Becker
Hardware Supported Adaptive Data Collection for Networks on Chip. IPDPS Workshops (2013)
Jan Heisswolf, Ralf König, Martin Kupper, Jürgen Becker
Providing multiple hard latency and throughput guarantees for packet switching networks on chip. Comput. Electr. Eng. 39 (8) (2013)
Jan Heisswolf, Ralf König, Jürgen Becker
A Scalable NoC Router Design Providing QoS Support Using Weighted Round Robin Scheduling. ISPA (2012)
Jürgen Becker, Stephanie Friederich, Jan Heisswolf, Ralf König, David May
Hardware prototyping of novel invasive multicore architectures. ASP-DAC (2012)
Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe
Invasive manycore architectures. ASP-DAC (2012)
Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS. IPDPS Workshops (2012)
Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker
Architecture design space exploration of run-time scalable issue-width processors. ICSAMOS (2011)
Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker
A Scalable Microarchitecture Design that Enables Dynamic Code Execution for Variable-Issue Clustered Processors. IPDPS Workshops (2011)