Login / Signup
Itaru Hida
Publication Activity (10 Years)
Years Active: 2013-2016
Publications (10 Years): 1
Top Topics
Bayes Classifiers
Reconfigurable Architecture
Probability Of Correct Classification
Low Power
Top Venues
A-SSCC
APCCAS
ReConFig
</>
Publications
</>
Itaru Hida
,
Masayuki Ikebe
,
Tetsuya Asai
,
Masato Motomura
A 2-clock-cycle Naïve Bayes classifier for dynamic branch prediction in pipelined RISC microprocessors.
APCCAS
(2016)
Itaru Hida
,
Dahoo Kim
,
Tetsuya Asai
,
Masato Motomura
A 4.5 to 13 times energy-efficient embedded microprocessor with mainly-static/partially-dynamic reconfigurable array accelerator.
A-SSCC
(2014)
Takeshi Hirao
,
Dahoo Kim
,
Itaru Hida
,
Tetsuya Asai
,
Masato Motomura
A restricted dynamically reconfigurable architecture for low power processors.
ReConFig
(2013)