Ichiro Tamitani

Publication Activity (10 Years)

Years Active: 1986-1997
Publications (10 Years): 0

Publications

Yasushi Ooi, Osamu Ohnishi, Yutaka Yokoyama, Yoichi Katayama, Masayuki Mizuno, Masakazu Yamashina, Hideo Takano, Naoya Hayashi, Ichiro Tamitani
An MPEG-2 encoder architecture based on a single-chip dedicated LSI with a control MPU. ICASSP (1997)
Masayuki Mizuno, Yasushi Ooi, Naoya Hayashi, Junichi Goto, Masatoshi Hozumi, Koichiro Furuta, Atsufumi Shibayama, Yoetsu Nakazawa, Osamu Ohnishi, Shu-Yu Zhu, Yutaka Yokoyama, Yoichi Katayama, Hideto Takano, Noriyuki Miki, Yuzo Senda, Ichiro Tamitani, Masakazu Yamashina
A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking. IEEE J. Solid State Circuits 32 (11) (1997)
Ichiro Tamitani, Mutsumi Ohta, Yasushi Ooi, Akio Yoshida, Mamoru Nomura, Hitoshi Koyama, Takao Nishitani
An encoder/decoder chip set for the MPEG video standard. ICASSP (1992)
Ichiro Tamitani, Hidenobu Harasaki, Takao Nishitani
A real-time HDTV signal processor: HD-VSP. IEEE Trans. Circuits Syst. Video Technol. 1 (1) (1991)
Takao Nishitani, Ichiro Tamitani, Hidenobu Harasaki, Mitsuharu Yano
A real-time software programmable processor for HDTV and stereo scope signals. ASAP (1990)
Takao Nishitani, Ichiro Tamitani, Hidenobu Harasaki, Yukio Endo, Toshiyuki Kanou, Koichi Kikuchi
Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP. J. VLSI Signal Process. 1 (1) (1989)
Hidenobu Harasaki, Ichiro Tamitani, Yukio Endo, Takao Nishitani, Masakatsu Yamashina, Tadayoshi Enomoto, Norio Suzuki
A single-board video signal processor module employing newly developed LSI devices. IEEE J. Sel. Areas Commun. 6 (3) (1988)
Hidenobu Harasaki, Ichiro Tamitani, Yukio Endo, Takao Nishitani, Masakatsu Yamashina, Tadayoshi Enomoto, Norio Suzuki
Realtime video signal processor module. ICASSP (1987)
Takao Nishitani, Ichiro Tamitani, Hidenobu Harasaki, Masakatsu Yamashina, Tadayoshi Enomoto
Video signal processor configuration by multiprocessor approach. ICASSP (1986)