Hyeongon Kim

Publication Activity (10 Years)

Years Active: 2014-2017
Publications (10 Years): 1

Top Topics

Mobile Learning

Dynamic Random Access Memory

Hierarchical Architecture

Top Venues

IEEE J. Solid State Circuits

Publications

Kwangmyoung Rho, Kenji Tsuchida, Dongkeun Kim, Yutaka Shirai, Jihyae Bae, Tsuneo Inaba, Hiromi Noro, Hyunin Moon, Sungwoong Chung, Kazumasa Sunouchi, Jinwon Park, Kiseon Park, Akihito Yamamoto, Seoungju Chung, Hyeongon Kim, Hisato Oyamatsu, Jonghoon Oh
23.5 A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture. ISSCC (2017)
Yeo Myung Kim, Woojun Choi, Jaehoon Kim, Sanghoon Lee, Sangho Lee, Hyeongon Kim, Kofi A. A. Makinwa, Youngcheol Chae, Tae Wook Kim
embedded temperature sensor with ±2°C inaccuracy for self-refresh control in 25nm mobile DRAM. ESSCIRC (2015)
Keunsoo Song, Sangkwon Lee, Dongkyun Kim, Youngbo Shim, Sangil Park, Bokrim Ko, Duckhwa Hong, Yongsuk Joo, Wooyoung Lee, Yongdeok Cho, Wooyeol Shin, Jaewoong Yun, Hyengouk Lee, Jeonghun Lee, Eunryeong Lee, Namkyu Jang, Jaemo Yang, Haekang Jung, Joohwan Cho, Hyeongon Kim, Jinkook Kim
A 1.1 V 2y-nm 4.35 Gb/s/pin 8 Gb LPDDR4 Mobile Device With Bandwidth Improvement Techniques. IEEE J. Solid State Circuits 50 (8) (2015)
Keunsoo Song, Sangkwon Lee, Dongkyun Kim, Youngbo Shim, Sangil Park, Bokrim Ko, Duckhwa Hong, Yongsuk Joo, Wooyoung Lee, Yongdeok Cho, Wooyeol Shin, Jaewoong Yun, Hyengouk Lee, Jeonghun Lee, Eunryeong Lee, Jaemo Yang, Haekang Jung, Namkyu Jang, Joohwan Cho, Hyeongon Kim
A 1.1V 2y-nm 4.35Gb/s/pin 8Gb LPDDR4 mobile device with bandwidth improvement techniques. CICC (2014)