Huy Nam Nguyen

Publication Activity (10 Years)

Years Active: 1988-2007
Publications (10 Years): 0

Publications

Huy Nam Nguyen, Vu-Duc Ngo, Younghwan Bae, Hanjin Cho, Hae-Wook Choi
An QoS Aware Mapping of Cores Onto NoC Architectures. ISPA (2007)
Vu-Duc Ngo, Huy Nam Nguyen, Younghwan Bae, Hanjin Cho, Hae-Wook Choi
Throughput Aware Mapping for Network on Chip Design of H.264 Decoder. ISPA Workshops (2006)
Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi
The Optimum Network on Chip Architectures for Video Object Plane Decoder Design. ISPA (2006)
Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi
Analyzing the Performance of Mesh and Fat-Tree Topologies for Network on Chip Design. EUC (2005)
Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi
Designing On-Chip Network Based on Optimal Latency Criteria. ICESS (2005)
Huy Nam Nguyen, Vu-Duc Ngo, Hae-Wook Choi
Realization of Video Object Plane Decoder on On-Chip Network Architecture. ICESS (2005)
Huy Nam Nguyen, Vu-Duc Ngo, Hae-Wook Choi
Realization of video object plane decoder on mesh on-chip network architecture. Circuits, Signals, and Systems (2005)
Huy Nam Nguyen, Michel Thill
Design Verification based on Hardware Emulation. RSP (1996)
J. P. Tual, Michel Thill, C. Bernard, Huy Nam Nguyen, F. Mottini, M. Moreau, P. Vallet
Auriga2: a 4.7 million-transistor CISC microprocessor. ASP-DAC (1995)
Huy Nam Nguyen, Yvon Gressus, Michel D'Hoe
Application of synthesis to support hardware emulation. RSP (1995)
Huy Nam Nguyen, J. P. Tual, L. Ducousso, Michel Thill, P. Vallet
The Structured Logic CAD Suite Used on the DPS7000 System. ICCD (1994)
Huy Nam Nguyen, J. P. Tual, L. Ducousso, Michel Thill, P. Vallet
Logic Synthesis and Verification of the CPU and Caches of a Mainframe System. EDAC-ETC-EUROASIC (1994)
Huy Nam Nguyen, L. Ducousso
Automated synthesis of combinational logic using problem solving techniques. SPLT (1989)
Huy Nam Nguyen, L. Ducousso
Utilisation de CHIP pour la synthèse et vérification des circuits CMOS. SPLT (1988)