Login / Signup
Throughput Aware Mapping for Network on Chip Design of H.264 Decoder.
Vu-Duc Ngo
Huy Nam Nguyen
Younghwan Bae
Hanjin Cho
Hae-Wook Choi
Published in:
ISPA Workshops (2006)
Keyphrases
</>
response time
real time
image processing
design process
multistage