Hsin-Yuan Tseng

Publication Activity (10 Years)

Years Active: 2012-2015
Publications (10 Years): 0

Top Topics

Cmos Technology

Silicon On Insulator

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Microelectron. J.

Publications

Chua-Chin Wang, Wen-Je Lu, Kai-Wei Juan, Wei Lin, Hsin-Yuan Tseng, Chun-Ying Juan
Process corner detection by skew inverters for 500 MHZ 2×VDD output buffer using 40-nm CMOS technology. Microelectron. J. 46 (1) (2015)
Chua-Chin Wang, Wen-Je Lu, Hsin-Yuan Tseng
A high-speed 2×VDD output buffer with PVT detection using 40-nm CMOS technology. ISCAS (2013)
Chua-Chin Wang, Chih-Lin Chen, Hsin-Yuan Tseng, Hsiao-Han Hou, Chun-Ying Juan
A 800 Mbps and 12.37 ps Jitter Bidirectional Mixed-Voltage I/O Buffer With Dual-Path Gate-Tracking Circuit. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2013)
Chua-Chin Wang, Chih-Lin Chen, Ron-Chi Kuo, Hsin-Yuan Tseng, Jen-Wei Liu, Chun-Ying Juan
On-Chip Process and Temperature Monitor for Self-Adjusting Slew Rate Control of 2, ×, VDD Output Buffers. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2013)
Chua-Chin Wang, Wen-Je Lu, Chih-Lin Chen, Hsin-Yuan Tseng, Ron-Chi Kuo, Chun-Ying Juan
A 2×VDD output buffer with PVT detector for slew rate compensation. Microelectron. J. 44 (5) (2013)
Chih-Lin Chen, Hsin-Yuan Tseng, Ron-Chi Kuo, Chua-Chin Wang
On-chip MOS PVT variation monitor for slew rate self-adjusting 2×VDD output buffers. ICICDT (2012)
Chih-Lin Chen, Hsin-Yuan Tseng, Ron-Chi Kuo, Chua-Chin Wang
A slew rate self-adjusting 2×VDD output buffer With PVT compensation. VLSI-DAT (2012)