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On-chip MOS PVT variation monitor for slew rate self-adjusting 2×VDD output buffers.

Chih-Lin ChenHsin-Yuan TsengRon-Chi KuoChua-Chin Wang
Published in: ICICDT (2012)
Keyphrases
  • real time
  • high speed
  • monitoring system
  • buffer size
  • vlsi design
  • low cost
  • high density
  • circuit design
  • single chip
  • vlsi implementation
  • neural network
  • learning algorithm
  • information systems
  • production system