Hsin-Chou Chi

Publication Activity (10 Years)

Years Active: 1991-2014
Publications (10 Years): 0

Top Topics

Multi Core Processors

Network On Chip

Parallel Architecture

Top Venues

Publications

Hsin-Chou Chi, Han-Sheng Liu, Hsi-Che Tseng
A high-performance VLSI architecture for variable block size motion estimation. GCCE (2014)
Hsin-Chou Chi, Hsi-Che Tseng, Chia-Wei Jeng
Reconfigurable VLSI digital filters for tolerating multiple timing errors. GCCE (2013)
Hsin-Chou Chi, Jr-Fen Ferng, Yu-Chen Hsieh
Area Utilization Based Mapping for Network-on-chip Architectures with Over-sized IP Cores. HPCC-ICESS (2012)
Hsin-Chou Chi, Hsi-Che Tseng, Chih-Ling Yang
Efficient diagnosable design of the IEEE P1500 architecture for SoC testing. NESEA (2011)
Hsin-Chou Chi, Hsi-Che Tseng, Kun-Lin Tsai
Design of timing-error-resilient systolic arrays for matrix multiplication. ISOCC (2011)
Hsin-Chou Chi, Tat-Seng Chang, Chia-Ming Wu
Design of a Reconfigurable Pipelined Switch for Faulty On-Chip Networks. SIES (2010)
Hsin-Chou Chi, Yu-Hong Jhang, Wen-Shu Chen
Tree-Based Routing for Faulty On-Chip Networks with Mesh Topology. ISVLSI (2010)
Hsin-Chou Chi, Hsi-Che Tseng, Chih-Ling Yang
Efficient diagnosis of scan chains with single stuck-at faults. CISS (2009)
Hsin-Chou Chi, Chia-Ming Wu, Jun-Hui Lee
Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip Architectures. DELTA (2008)
Hsin-Chou Chi, Chia-Ming Wu
An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures. VLSI-SoC (2006)
Hsin-Chou Chi, Chia-Ming Wu, Sung-Tze Wu
A Switch Supporting Circuit and Packet Switching for On-Chip Networks. DDECS (2006)
Hsin-Chou Chi, Chia-Ming Wu
Efficient Switches for Network-on-Chip Based Embedded Systems. EUC (2005)
Hsin-Chou Chi, Wen-Jen Wu
Routing Tree Construction for Interconnection Network with Irregular Topologies. PDP (2003)
Hsin-Chou Chi, Chih-Tsung Tang
A Deadlock-Free Routing Scheme for Interconnection Networks with Irregular Topologies. ICPADS (1997)
Hsin-Chou Chi, Yuval Tamir
Starvation Prevention for Arbiters of Crossbars with Multi-Queue Input Buffers. COMPCON (1994)
Yuval Tamir, Hsin-Chou Chi
Symmetric Crossbar Arbiters for VLSI Communication Switches. IEEE Trans. Parallel Distributed Syst. 4 (1) (1993)
Hsin-Chou Chi, Yuval Tamir
Decomposed Arbiters for Large Crossbars with Multi-Queue Input Buffers. ICCD (1991)