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An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures.

Hsin-Chou ChiChia-Ming Wu
Published in: VLSI-SoC (2006)
Keyphrases
  • network on chip
  • power dissipation
  • high speed
  • routing algorithm
  • power consumption
  • scheduling algorithm
  • low power
  • interconnection networks
  • data transfer
  • low cost
  • multi processor