Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip Architectures.

Hsin-Chou Chi Chia-Ming Wu Jun-Hui Lee

Published in: DELTA (2008)

Keyphrases

network on chip
interconnection networks
power dissipation
high speed
routing algorithm
scheduling problem
fault tolerant
cmos technology
network simulator
multi processor
multistage
parallel algorithm
power consumption
scheduling algorithm
data transfer