Hiroaki Fujita

Publication Activity (10 Years)

Years Active: 1976-2020
Publications (10 Years): 2

Top Topics

Wireless Systems

Frequency Response

Top Venues

IEEE J. Solid State Circuits

Publications

Masahisa Tamura, Hideyuki Takano, Hironori Nakahara, Hiroaki Fujita, Naoya Arisaka, Satoru Shinke, Norihito Suzuki, Yutaka Nakada, Yusuke Shinohe, Shinichirou Etou, Tetsuya Fujiwara, Fumitaka Kondo, Ken Yamamoto, Tomohiro Matsumoto, Yasushi Katayama
A 0.5-V BLE Transceiver With a 1.9-mW RX Achieving -96.4-dBm Sensitivity and -27-dBm Tolerance for Intermodulation From Interferers at 6- and 12-MHz Offsets. IEEE J. Solid State Circuits 55 (12) (2020)
Masahisa Tamura, Hideyuki Takano, Satoru Shinke, Hiroaki Fujita, Hironori Nakahara, Norihito Suzuki, Yutaka Nakada, Yusuke Shinohe, Shinichirou Etou, Tetsuya Fujiwara, Yasushi Katayama
30.5 A 0.5V BLE Transceiver with a 1.9mW RX Achieving -96.4dBm Sensitivity and 4.1dB Adjacent Channel Rejection at 1MHz Offset in 22nm FDSOI. ISSCC (2020)
Eric G. Stevens, Hirofumi Komori, Hung Doan, Hiroaki Fujita, Jeffery Kyan, Christopher Parks, Gang Shi, Cristian Tivarus, Jian Wu
Low-Crosstalk and Low-Dark-Current CMOS Image-Sensor Technology Using a Hole-Based Detector. ISSCC (2008)
Takeo Yasuda, Hiroaki Fujita, Hidetoshi Onodera
A dynamically phase adjusting PLL with a variable delay. ASP-DAC (2001)
Tomohiro Fujita, Ken-ichi Okada, Hiroaki Fujita, Hidetoshi Onodera, Keikichi Tamaru
A method for linking process-level variability to system performances. ASP-DAC (2000)
Akio Odaka, Hiroaki Fujita, Susumu Nojima, Hiroshi Narushima
A new normal form of Boolean functions. Discret. Math. 14 (3) (1976)