Hideyuki Takano

Publication Activity (10 Years)

Years Active: 2016-2020
Publications (10 Years): 4

Top Topics

Cmos Technology

Frequency Response

Top Venues

IEEE J. Solid State Circuits

Publications

Masahisa Tamura, Hideyuki Takano, Hironori Nakahara, Hiroaki Fujita, Naoya Arisaka, Satoru Shinke, Norihito Suzuki, Yutaka Nakada, Yusuke Shinohe, Shinichirou Etou, Tetsuya Fujiwara, Fumitaka Kondo, Ken Yamamoto, Tomohiro Matsumoto, Yasushi Katayama
A 0.5-V BLE Transceiver With a 1.9-mW RX Achieving -96.4-dBm Sensitivity and -27-dBm Tolerance for Intermodulation From Interferers at 6- and 12-MHz Offsets. IEEE J. Solid State Circuits 55 (12) (2020)
Masahisa Tamura, Hideyuki Takano, Satoru Shinke, Hiroaki Fujita, Hironori Nakahara, Norihito Suzuki, Yutaka Nakada, Yusuke Shinohe, Shinichirou Etou, Tetsuya Fujiwara, Yasushi Katayama
30.5 A 0.5V BLE Transceiver with a 1.9mW RX Achieving -96.4dBm Sensitivity and 4.1dB Adjacent Channel Rejection at 1MHz Offset in 22nm FDSOI. ISSCC (2020)
Toshinori Hosokawa, Hideyuki Takano, Hiroshi Yamazaki, Koji Yamazaki
A Diagnostic Fault Simulation Method for a Single Universal Logical Fault Model. PRDC (2017)
Ken Yamamoto, Kenichi Nakano, Gaku Hidai, Yuya Kondo, Hitoshi Tomiyama, Hideyuki Takano, Fumitaka Kondo, Yusuke Shinohe, Hidenori Takeuchi, Nobuhisa Ozawa, Shingo Harada, Shinichiro Eto, Mari Kishikawa, Daisuke Ide, Hiroyasu Tagami, Masayuki Katakura, Norio Shoji
26.5 A 0.7V 1.5-to-2.3mW GNSS receiver with 2.5-to-3.8dB NF in 28nm FD-SOI. ISSCC (2016)