Hideo Yamasaki

Publication Activity (10 Years)

Years Active: 2003-2007
Publications (10 Years): 0

Publications

Hideo Yamasaki, Tadashi Shibata
A Real-Time Image-Feature-Extraction and Vector-Generation VLSI Employing Arrayed-Shift-Register Architecture. IEEE J. Solid State Circuits 42 (9) (2007)
Hideo Yamasaki, Tadashi Shibata
A real-time image-feature-extraction and vector-generation VLSI employing arrayed-shift-register architecture. ESSCIRC (2005)
Hideo Yamasaki, Tadashi Shibata
A high-speed median filter VLSI using floating-gate-MOS-based low-power majority voting circuits. ESSCIRC (2005)
Hideo Yamasaki, Tadashi Shibata
A real-time VLSI median filter employing two-dimensional bit-propagating architecture. ISCAS (2) (2004)
Masakazu Yagi, Hideo Yamasaki, Tadashi Shibata
A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors. NIPS (2003)