A real-time image-feature-extraction and vector-generation VLSI employing arrayed-shift-register architecture.
Hideo YamasakiTadashi ShibataPublished in: ESSCIRC (2005)
Keyphrases
- image feature extraction
- real time
- vlsi architecture
- shift register
- high speed
- vlsi implementation
- hardware implementation
- random number generator
- low cost
- signal processing
- image processing
- feature extraction
- image indexing
- feature vectors
- image registration
- processing units
- corner detection
- image features
- computer vision