A high-speed median filter VLSI using floating-gate-MOS-based low-power majority voting circuits.
Hideo YamasakiTadashi ShibataPublished in: ESSCIRC (2005)
Keyphrases
- floating gate
- low power
- median filter
- majority voting
- high speed
- vlsi circuits
- gate array
- image enhancement
- noise reduction
- focal plane
- knn
- power dissipation
- ensemble methods
- cmos technology
- k nearest neighbor
- digital signal processing
- support vector machine
- logic circuits
- mixed signal
- image sensor
- structuring elements
- pixel values
- real time
- power consumption
- signal processing
- low cost
- co occurrence
- synaptic weights
- circuit design
- neural network model
- edge detection
- video sequences
- multiscale