Harish Patil

Publication Activity (10 Years)

Years Active: 1993-2022
Publications (10 Years): 4

Top Venues

CGO

ISPASS

IISWC

HPCA

University of Wisconsin-Madison, WI, USA (PHD)

Education History

University of Wisconsin-Madison, WI, USA

PHD

Publications

Alen Sabu, Harish Patil, Wim Heirman, Trevor E. Carlson
LoopPoint: Checkpoint-driven Sampled Simulation for Multi-threaded Applications. HPCA (2022)
Harish Patil, Alexander Isaev, Wim Heirman, Alen Sabu, Ali Hajiabadi, Trevor E. Carlson
ELFies: Executable Region Checkpoints for Performance Analysis and Simulation. CGO (2021)
Charles Yount, Harish Patil, Mohammad S. Islam, Aditya Srikanth
Graph-matching-based simulation-region selection for multiple binaries. ISPASS (2015)
Melanie Kambadur, Sunpyo Hong, Juan Cabral, Harish Patil, Chi-Keung Luk, Sohaib Sajid, Martha A. Kim
Fast Computational GPU Design with GT-Pin. IISWC (2015)
Yan Wang, Harish Patil, Cristiano Pereira, Gregory Lueck, Rajiv Gupta, Iulian Neamtiu
DrDebug: Deterministic Replay based Cyclic Debugging with Dynamic Slicing. CGO (2014)
Gregory Lueck, Harish Patil, Cristiano Pereira
PinADX: an interface for customizable debugging with dynamic instrumentation. CGO (2012)
Harish Patil, Cristiano Pereira, Mack Stallcup, Gregory Lueck, James Cownie
PinPlay: a framework for deterministic replay and reproducible analysis of parallel programs. CGO (2010)
Moshe Bach, Mark Charney, Robert Cohn, Elena Demikhovsky, Tevi Devor, Kim M. Hazelwood, Aamer Jaleel, Chi-Keung Luk, Gail Lyons, Harish Patil, Ady Tal
Analyzing Parallel Programs with Pin. Computer 43 (3) (2010)
Cristiano Pereira, Harish Patil, Brad Calder
Reproducible simulation of multi-threaded workloads for architecture design exploration. IISWC (2008)
Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jaleel, Greg Hamerly, Brad Calder
Cross Binary Simulation Points. ISPASS (2007)
Satish Narayanasamy, Cristiano Pereira, Harish Patil, Robert Cohn, Brad Calder
Automatic logging of operating system effects to guide application-level architecture simulation. SIGMETRICS/Performance (2006)
Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood
Pin: building customized program analysis tools with dynamic instrumentation. PLDI (2005)
Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney
Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture. CGO (2004)
Harish Patil, Robert S. Cohn, Mark Charney, Rajiv Kapoor, Andrew Sun, Anand Karunanidhi
Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation. MICRO (2004)
Chi-Keung Luk, Robert Muth, Harish Patil, Richard Weiss, P. Geoffrey Lowney, Robert S. Cohn
Profile-guided post-link stride prefetching. ICS (2002)
Joel S. Emer, Pritpal S. Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan
Asim: A Performance Model Framework. Computer 35 (2) (2002)
Harish Patil, Joel S. Emer
Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing. HPCA (2000)
Le-Chun Wu, Rajiv Mirani, Harish Patil, Bruce Olsen, Wen-mei W. Hwu
A New Framework for Debugging Globally Optimized Code. PLDI (1999)
Harish Patil, Charles N. Fischer
Low-Cost, Concurrent Checking of Pointer and Array Accesses in C Programs. Softw. Pract. Exp. 27 (1) (1997)
Harish Patil, Charles N. Fischer
Efficient Run-time Monitoring Using Shadow Processing. AADEBUG (1995)
Dhananjay M. Dhamdhere, Harish Patil
An Elimination Algorithm for Bidirectional Data Flow Problems Using Edge Placement. ACM Trans. Program. Lang. Syst. 15 (2) (1993)

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Publication Activity (10 Years)

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Harish Patil