Hae-Woong Yang

Publication Activity (10 Years)

Years Active: 2014-2019
Publications (10 Years): 5

Top Topics

Power Consumption

Distributed Breakout

Infinite Impulse Response

Top Venues

IEEE J. Solid State Circuits

Publications

Ashkan Roshan-Zamir, Takayuki Iwai, Yang-Hang Fan, Ankur Kumar, Hae-Woong Yang, Lee Sledjeski, John Hamilton, Soumya Chandramouli, Arlo Aude, Samuel Palermo
A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS. IEEE J. Solid State Circuits 54 (3) (2019)
Ashkan Roshan-Zamir, Takayuki Iwai, Yang-Hang Fan, Ankur Kumar, Hae-Woong Yang, Lee Sledjeski, John Hamilton, Soumya Chandramouli, Arlo Aude, Samuel Palermo
A 56 Gb/s PAM4 receiver with low-overhead threshold and edge-based DFE FIR and IIR-tap adaptation in 65nm CMOS. CICC (2018)
Hae-Woong Yang, Ashkan Roshan-Zamir, Young-Hoon Song, Samuel Palermo
A low-power dual-mode 20-Gb/s NRZ and 28-Gb/s PAM-4 voltage-mode transmitter. A-SSCC (2017)
Ashkan Roshan-Zamir, Osama Elhadidy, Hae-Woong Yang, Samuel Palermo
A Reconfigurable 16/32 Gb/s Dual-Mode NRZ/PAM4 SerDes in 65-nm CMOS. IEEE J. Solid State Circuits 52 (9) (2017)
Osama Elhadidy, Ashkan Roshan-Zamir, Hae-Woong Yang, Samuel Palermo
A 32 Gb/s 0.55 mW/Gbps PAM4 1-FIR 2-IIR tap DFE receiver in 65-nm CMOS. VLSIC (2015)
Young-Hoon Song, Hae-Woong Yang, Hao Li, Patrick Yin Chiang, Samuel Palermo
26.5 An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-tap impedance-modulated voltage-mode transmitter with fast power-state transitioning in 65nm CMOS. ISSCC (2014)