A Reconfigurable 16/32 Gb/s Dual-Mode NRZ/PAM4 SerDes in 65-nm CMOS.

Ashkan Roshan-Zamir Osama Elhadidy Hae-Woong Yang Samuel Palermo

Published in: IEEE J. Solid State Circuits (2017)

Keyphrases

low cost
high speed
cmos technology
silicon on insulator
metal oxide semiconductor
low power
nm technology
power consumption
analog vlsi
power supply
reconfigurable architecture
floating gate
general purpose
hardware implementation
vlsi circuits
circuit design
fine grain
neural network
image sensor
primal dual