Gerald G. Pechanek

Publication Activity (10 Years)

Years Active: 1991-2017
Publications (10 Years): 1

Top Topics

Application Specific

Level Parallelism

Direct Memory Access

Top Venues

Publications

Gerald G. Pechanek, Nikos Pitsianis
An introduction to an array memory processor for application specific acceleration. HPEC (2017)
Nikos Pitsianis, Gerald G. Pechanek
Indirect VLIW memory allocation for the ManArray multiprocessor DSP. SIGARCH Comput. Archit. News 31 (1) (2003)
Koen Bertels, Luc Neuberg, Stamatis Vassiliadis, Gerald G. Pechanek
A look inside the learning process of neural networks. Complex. 5 (6) (2000)
Bruce Schulman, Gerald G. Pechanek
A 90k Gate "CLB" for Parallel Distributed Computing. IPDPS Workshops (2000)
Gerald G. Pechanek, Stamatis Vassiliadis
The ManArray( Embedded Processor Architecture. EUROMICRO (2000)
Gerald G. Pechanek, Stamatis Vassiliadis, Nikos Pitsianis
ManArray Processor Interconnection Network: An Introduction. Euro-Par (1999)
Valentine C. Aikens II, José G. Delgado-Frias, Gerald G. Pechanek, Stamatis Vassiliadis
A neuro-emulator with embedded capabilities for generalized learning. J. Syst. Archit. 45 (14) (1999)
Stamatis Vassiliadis, Edwin A. Hakkennes, J. S. S. M. Wong, Gerald G. Pechanek
The Sum-Absolute-Difference Motion Estimation Accelerato. EUROMICRO (1998)
Valentine C. Aikens II, José G. Delgado-Frias, Steven M. Barber, Gerald G. Pechanek, Stamatis Vassiliadis
A neuro-emulator with learning and virtual emulation capabilities. ICNN (1996)
Chris H. L. Moller, Gerald G. Pechanek
Architectural simulation system for M.f.a.s.t. Annual Simulation Symposium (1996)
Valentine C. Aikens II, Steven M. Barber, José G. Delgado-Frias, Gerald G. Pechanek, Stamatis Vassiliadis
A Neuro-Architecture with Embedded Learning. Parallel and Distributed Computing and Systems (1995)
Gerald G. Pechanek, M. Stojancic, Stamatis Vassiliadis, C. John Glossner
MFAST: a single chip highly parallel image processing architecture. ICIP (1995)
Gerald G. Pechanek, José G. Delgado-Frias, Stamatis Vassiliadis
A massively parallel diagonal-fold array processor. ASAP (1993)
Stamatis Vassiliadis, Gerald G. Pechanek, José G. Delgado-Frias
Spin: the Sequential Pipelined Neuroemulator. Int. J. Artif. Intell. Tools 2 (1) (1993)
Gerald G. Pechanek, Stamatis Vassiliadis, José G. Delgado-Frias
Digital neural emulators using tree accumulation and communication structures. IEEE Trans. Neural Networks 3 (6) (1992)
Stamatis Vassiliadis, Gerald G. Pechanek, José G. Delgado-Frias
SPIN: a sequential pipelined neurocomputer. ICTAI (1991)
Nikolaos G. Bourbakis, Robin Williams, Forouzan Golshani, Myron Flickner, Ted Laliotis, Sukhan Lee, José G. Delgado-Frias, Dan Hammerstrom, Cris Koutsougeras, Gerald G. Pechanek, Benjamin W. Wah, John Yen, Farokh B. Bastani, Tom Cooper, Karan Harbison-Briggs, Rudy Lauber, Alun D. Preece, Imran A. Zualkernan, W. T. Tsai, Daniel E. Cooke, Martin S. Feather, Stephen Fickas, N. Minsky, Peter G. Selfridge, Douglas Smith
AI in multimedia (panel session). ICTAI (1991)