Gefu Xu

Publication Activity (10 Years)

Years Active: 2005-2007
Publications (10 Years): 0

Publications

Gefu Xu, Adit D. Singh
Flip-flop Selection to Maximize TDF Coverage with Partial Enhanced Scan. ATS (2007)
Gefu Xu, Adit D. Singh
Achieving high transition delay fault coverage with partial DTSFF scan chains. ITC (2007)
Gefu Xu, Adit D. Singh
Scan cell design for launch-on-shift delay tests with slow scan enable. IET Comput. Digit. Tech. 1 (3) (2007)
Gefu Xu, Adit D. Singh
Delay Test Scan Flip-Flop: DFT for High Coverage Delay Testing. VLSI Design (2007)
Adit D. Singh, Gefu Xu
Output Hazard-Free Transition Tests for Silicon Calibrated Scan Based Delay Testing. VTS (2006)
Gefu Xu, Adit D. Singh
Low Cost Launch-on-Shift Delay Test with Slow Scan Enable. ETS (2006)
Haihua Yan, Gefu Xu, Adit D. Singh
Low Voltage Test in Place of Fast Clock in DDSI Delay Test. ISQED (2005)
Haihua Yan, Adit D. Singh, Gefu Xu
Delay Defect Characterization Using Low Voltage Test. Asian Test Symposium (2005)