Gaoming Du

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 19

Top Topics

Routing Algorithm

Homomorphic Encryption

Network On Chip

Top Venues

J. Circuits Syst. Comput.

IEEE Trans. Circuits Syst. II Express Briefs

ACM Great Lakes Symposium on VLSI

Publications

Gaoming Du, Zhuo Chen, Zhenmin Li, Xiaolei Wang, Duoli Zhang
A Low-Latency Polynomial Multiplier Accelerator for CRYSTALS-Dilithium Digital Signature. ACM Great Lakes Symposium on VLSI (2024)
Peiyi Teng, Gaoming Du, Zhenmin Li, Xiaolei Wang, Yongsheng Yin
High-speed hardware accelerator based on brightness improved by Light-DehazeNet. J. Real Time Image Process. 21 (3) (2024)
Jingwei Ren, Gaoming Du, Zhenmin Li, Xianhu Jia, Qiuzhu Liao, Xiaolei Wang, Duoli Zhang
An Efficient Ring Polynomial Multiplication Accelerator for Homomorphic Encryption. IEEE Trans. Circuits Syst. II Express Briefs 71 (1) (2024)
Zhenmin Li, Jingwei Ren, Gaoming Du, Zhenxing Tu, Xiaolei Wang, Yongsheng Yin, Yiming Ouyang
An Area-Efficient Large Integer NTT-Multiplier Using Discrete Twiddle Factor Approach. IEEE Trans. Circuits Syst. II Express Briefs 70 (2) (2023)
Zhenmin Li, Yuqing Ma, Gaoming Du, Xiaolei Wang, Yukun Song, Duoli Zhang
RB-OLITS: A Worst Case Reorder Buffer Size Reduction Approach for 3-D-NoC. IEEE Des. Test 39 (6) (2022)
Gaoming Du, Bangyi Chen, Zhenmin Li, Zhenxing Tu, Junjie Zhou, Shenya Wang, Qinghao Zhao, Yongsheng Yin, Xiaolei Wang
A BNN Accelerator Based on Edge-skip-calculation Strategy and Consolidation Compressed Tree. ACM Trans. Reconfigurable Technol. Syst. 15 (3) (2022)
Shijie Hu, Gaoming Du, Jiashen Li, Zhenmin Li, Wei Ni, Yong-Sheng Yin, Xiaolei Wang
Optimization of Node-clustering-based DAG partition targeting NVDLA Architecture. ASICON (2021)
Gaoming Du, Jiting Wu, Hongfang Cao, Kun Xing, Zhenmin Li, Duoli Zhang, Xiaolei Wang
A Real-Time Effective Fusion-Based Image Defogging Architecture on FPGA. ACM Trans. Multim. Comput. Commun. Appl. 17 (3) (2021)
Gaoming Du, Yifan Cao, Zhenmin Li, Duoli Zhang, Li Wang, Yu-Kun Song, Yiming Ouyang
A low-latency DMM-1 encoder for 3D-HEVC. J. Real Time Image Process. 17 (3) (2020)
Yiming Ouyang, Wu Zhou, Sheng Li, Zhilu Wang, Huaguo Liang, Gaoming Du
Design of a Wireless Router with Virtual Channel Fault Tolerant in WiNoC. J. Circuits Syst. Comput. 29 (10) (2020)
Gaoming Du, Zhenwen Yang, Zhenmin Li, Duoli Zhang, Yong-Sheng Yin, Zhonghai Lu
NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator. ICCD (2019)
Gaoming Du, Chao Tian, Zhenmin Li, Duoli Zhang, Yong-Sheng Yin, Yiming Ouyang
Efficient Softmax Hardware Architecture for Deep Neural Networks. ACM Great Lakes Symposium on VLSI (2019)
Gaoming Du, Guanyu Liu, Zhenmin Li, Yifan Cao, Duoli Zhang, Yiming Ouyang, Minglun Gao, Zhonghai Lu
SSS: Self-aware System-on-chip Using a Static-dynamic Hybrid Method. ACM J. Emerg. Technol. Comput. Syst. 15 (3) (2019)
Yiming Ouyang, Zhe Li, Jianhua Li, Chenglong Sun, Huaguo Liang, Gaoming Du
CPCA: An efficient wireless routing algorithm in WiNoC for cross path congestion awareness. Integr. 69 (2019)
Gaoming Du, Yongliang Zhang, Zhenmin Li, Guanyu Liu, Duoli Zhang, Yiming Ouyang
On the Accuracy of Stochastic Delay Bound for Network on Chip. NOCS (2017)
Yiming Ouyang, Jian Da, Xiumin Wang, Qianqian Han, Huaguo Liang, Gaoming Du
A TSV Fault-Tolerant Scheme Based on Failure Classification in 3D-NoC. J. Circuits Syst. Comput. 26 (4) (2017)
Gaoming Du, Shibi Ma, Zhenmin Li, Zhonghai Lu, Yiming Ouyang, Minglun Gao
SSS: self-aware system-on-chip using static-dynamic hybrid method (work-in-progress). CASES (2017)
Yiming Ouyang, Qi Chen, Xiumin Wang, Xiaoye Ouyang, Huaguo Liang, Gaoming Du
AFTER: Asynchronous Fault-Tolerant Router Design in Network-on-Chip. J. Circuits Syst. Comput. 25 (6) (2016)
Gaoming Du, Yanghao Ou, Xiangyang Li, Ping Song, Zhonghai Lu, Minglun Gao
OLITS: An Ohm's Law-like traffic splitting model based on congestion prediction. DATE (2016)
Alberto Saggio, Gaoming Du, Xueqian Zhao, Zhonghai Lu
Validating Delay Bounds in Networks on Chip: Tightness and Pitfalls. ISVLSI (2015)
Gaoming Du, Miao Li, Zhonghai Lu, Minglun Gao, Chunhua Wang
An analytical model for worst-case reorder buffer size of multi-path minimal routing NoCs. NOCS (2014)
Gaoming Du, Cunqiang Zhang, Zhonghai Lu, Alberto Saggio, Minglun Gao
Worst-case performance analysis of 2-D mesh NoCs using multi-path minimal routing. CODES+ISSS (2012)
Wei Yi, Hongbing Pan, Peng Pan, Li Li, Minglun Gao, Ning Hou, Gaoming Du, Duoli Zhang
Application-level pipelining on Hierarchical NoC. ISCAS (2010)
Chun-Ping Qin, Duoli Zhang, Gaoming Du, Minglun Gao, Yu-Kun Song
VLSI Architecture of Video Post-Processing System for MPEG/H.26X. NCM (2009)
Duoli Zhang, Yu-Kun Song, Gaoming Du, Yuanjie Zhai
A technique of automatic monitor generation based on FSM. APCCAS (2008)
Gaoming Du, Duoli Zhang, Yu-Kun Song, Minglun Gao, Luofeng Geng, Ning Hou
Scalability Study on Mesh Based Network on Chip. PACIIA (2) (2008)
Yong-Sheng Yin, Gaoming Du, Yu-Kun Song
Study on the Multi-pipeline Reconfigurable Computing System. CSSE (4) (2008)
Luofeng Geng, Gaoming Du, Duoli Zhang, Minglun Gao, Ning Hou, Yu-Kun Song
Design and performance evaluation of a 2D-mesh Network on Chip prototype using FPGA. APCCAS (2008)
Yong-Sheng Yin, Li Li, Minglun Gao, Gaoming Du, Yu-Kun Song
On the Implementation of Virtual Array Using Configuration Plane. APPT (2007)