Validating Delay Bounds in Networks on Chip: Tightness and Pitfalls.

Alberto Saggio Gaoming Du Xueqian Zhao Zhonghai Lu

Published in: ISVLSI (2015)

Keyphrases

lower bound
low cost
high speed
upper bound
social networks
worst case
high bandwidth
network design
qos parameters
single chip
heterogeneous networks
lower and upper bounds
high density
computer networks
upper and lower bounds
power law
vc dimension
power dissipation
differentiated services
network structure