Gabriel M. Silberman

Publication Activity (10 Years)

Years Active: 1982-2012
Publications (10 Years): 0

Top Topics

Heuristic Methods

Hardware Architecture

Top Venues

CAiSE Workshops

Publications

Ethan Hadar, Irit Hadar, Gabriel M. Silberman, John J. Harrison Jr.
The 4x6 Tiered Architecture Method: An Approach to the Design of Enterprise Solutions. CAiSE Workshops (2012)
Ethan Hadar, Gabriel M. Silberman
Agile architecture methodology: long term strategy interleaved with short term tactics. OOPSLA Companion (2008)
Michael A. Bauer, Gene F. Hoffnagle, J. Howard Johnson, Gabriel M. Silberman
Introduction. Inf. Syst. Frontiers 5 (2) (2003)
Michael A. Bauer, Gene F. Hoffnagle, J. Howard Johnson, Gabriel M. Silberman
Introduction. Inf. Syst. Frontiers 4 (4) (2002)
Leon J. Osterweil, Gabriel M. Silberman, Kenny Wong
New Software Engineering Faculty Symposium. ICSE (2001)
Walid A. Najjar, Gabriel M. Silberman
Foreword to the special issues. Int. J. Parallel Program. 25 (4) (1997)
Stephen G. Perelgut, Gabriel M. Silberman, Kelly A. Lyons, Karen Bennet
Overview: The Centre for Advanced Studies. IBM Syst. J. 36 (4) (1997)
Gabriel M. Silberman
The Third International Conference on Parallel Computing Technologies (PaCT-95), Saint Petersburg, Russia. ACM SIGPLAN Notices 31 (2) (1996)
Gabriel M. Silberman, Ilan Y. Spillinger
A backtracing-oriented procedure for the analysis of combinational gate-level designs. Integr. 17 (3) (1994)
Kemal Ebcioglu, Randy D. Groves, Ki-Chang Kim, Gabriel M. Silberman, Isaac Ziv
VLIW Compilation Techniques in a Superscalar Environment. PLDI (1994)
Gabriel M. Silberman, Kemal Ebcioglu
An Architectural Framework for Supporting Heterogeneous Instruction-Set Architectures. Computer 26 (6) (1993)
Shlomit Weiss, Ilan Y. Spillinger, Gabriel M. Silberman
Architectural Improvement for a Data-Driven VLSI Processing Array. J. Parallel Distributed Comput. 19 (4) (1993)
Gabriel M. Silberman, Kemal Ebcioglu
An architectural framework for migration from CISC to higher performance platforms. ICS (1992)
Gabriel M. Silberman, Ilan Y. Spillinger
Functional Fault Simulation as a Guide for Biased-Random Test Pattern Generation. IEEE Trans. Computers 40 (1) (1991)
Gabriel M. Silberman, Ilan Y. Spillinger
RIDDLE: A Foundation for Test Generation on a High-Level Design Description. IEEE Trans. Computers 40 (1) (1991)
Gabriel M. Silberman, Ilan Y. Spillinger
Using functional fault simulation and the difference fault model to estimate implementation fault coverage. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (12) (1990)
Shlomit Weiss, Ilan Y. Spillinger, Gabriel M. Silberman
Architectural Improvements for Data-Driven VLSI Processing Arrays. FPCA (1989)
Raphael Renous, Gabriel M. Silberman, Ilan Y. Spillinger
Whistle: A Workbench for Test Development of Library-Based Designs. Computer 22 (4) (1989)
Gabriel M. Silberman, Ilan Y. Spillinger
G-RIDDLE : A Formal Analysis of Logic Designs Condiucive to the Acceleration of Backtracing. ITC (1988)
Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman
SLS-a fast switch-level simulator [for MOS]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7 (8) (1988)
Paul Erdös, Israel Koren, Shlomo Moran, Gabriel M. Silberman, Shmuel Zaks
Minimum-Diameter Cyclic Arrangements in Mapping Data-Flow Graphs onto VLSI Arrays. Math. Syst. Theory 21 (2) (1988)
Israel Koren, Bilha Mendelson, Irit Peled, Gabriel M. Silberman
A Data-Driven VLSI Array for Arbitrary Algorithms. Computer 21 (10) (1988)
Gabriel M. Silberman, Ilan Y. Spillinger
RIDDLE: a foundation for test generation on a high level design description. FTCS (1988)
Michael Granski, Israel Koren, Gabriel M. Silberman
The Effect of Operation Scheduling on the Performance of a Data Flow Computer. IEEE Trans. Computers 36 (9) (1987)
Bilha Mendelson, Gabriel M. Silberman
An Improved Mapping of Data Flow Programs on a VLSI Array of Processors. ICPP (1987)
Bilha Mendelson, Gabriel M. Silberman
Mapping Data Flow Programs on a VLSI Array of Processors. ISCA (1987)
Gabriel M. Silberman, Ilan Y. Spillinger
The Difference Fault Model : Using Functional Fault Simulation to Obtain Implementation Fault Coverage. ITC (1986)
Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman
SLS - a fast switch level simulator for verification and fault coverage analysis. DAC (1986)
Zeev Barzilai, J. Lawrence Carter, Vijay S. Iyengar, Indira Nair, Barry K. Rosen, Joe D. Rutledge, Gabriel M. Silberman
Efficient Fault Simulation of CMOS Circuits with Accurate Models. ITC (1986)
Ilan Y. Spillinger, Gabriel M. Silberman
Improving the Performance of a Switch-Level Simulator Targeted for a Logic Simulation Machine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5 (3) (1986)
Zeev Barzilai, Vijay S. Iyengar, Barry K. Rosen, Gabriel M. Silberman
Accurate Fault Modeling and Efficient Simulation of Differential CVS Circuits. ITC (1985)
Zeev Barzilai, Leendert M. Huisman, Gabriel M. Silberman, Donald T. Tang, Lin S. Woo
Fast Pass-Transistor Simulation for Custom MOS Circuits. IEEE Des. Test 1 (1) (1984)
Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Gabriel M. Silberman
Using a Hardware Simulation Engine for Custom MOS Structured Designs. IBM J. Res. Dev. 28 (5) (1984)
Dan Gordon, Israel Koren, Gabriel M. Silberman
Embedding Tree Stuctures in VLlSI Hexagonal Arrays. IEEE Trans. Computers 33 (1) (1984)
Gabriel M. Silberman
Stack Processing Techniques in Delayed-Staging Storage Hierarchies. Commun. ACM 26 (11) (1983)
Israel Koren, Gabriel M. Silberman
A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow Approach. ICPP (1983)
Zeev Barzilai, Leendert M. Huisman, Gabriel M. Silberman, Donald T. Tang, Lin S. Woo
Simulating pass transistor circuits using logic simulation machines. DAC (1983)
Gabriel M. Silberman
Delayed-Staging Hierarchy Optimization. IEEE Trans. Computers 32 (11) (1983)
Gabriel M. Silberman
Determining Fault Ratios in Multilevel Delayed-Staging Storage Hierarchies. IEEE Trans. Computers 31 (4) (1982)