Fatemeh Refan

Publication Activity (10 Years)

Years Active: 2007-2018
Publications (10 Years): 2

Top Topics

Symbolic Description

Parallel Algorithm

Compressive Sensing

Original Signal

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Fatemeh Refan, Bijan Alizadeh, Zainalabedin Navabi
Scalable Symbolic Simulation-Based Automatic Correction of Modern Processors. IEEE Trans. Very Large Scale Integr. Syst. 26 (10) (2018)
Fatemeh Refan, Bijan Alizadeh, Zainalabedin Navabi
Bridging Presilicon and Postsilicon Debugging by Instruction-Based Trace Signal Selection in Modern Processors. IEEE Trans. Very Large Scale Integr. Syst. 25 (7) (2017)
Fatemeh Refan, Bijan Alizadeh, Zainalabedin Navabi
Signature oriented model pruning to facilitate multi-threaded processors debugging. VTS (2015)
Hoda Ahmadinejad, Fatemeh Refan, Hessam S. Sarjoughian
NoC simulation modeling in DEVS-suite. SpringSim (TMS-DEVS) (2011)
Alireza Aminlou, Fatemeh Refan, Mahmoud Reza Hashemi, Omid Fatemi, Saeed Safari
A cost-error optimized architecture for 9/7 lifting based Discrete Wavelet Transform with balanced pipeline stages. ICASSP (2009)
Fatemeh Refan, Paolo Prinetto, Zainalabedin Navabi
An IEEE 1500 compatible wrapper architecture for testing cores at transaction level. EWDTS (2008)
Homa Alemzadeh, Stefano Di Carlo, Fatemeh Refan, Paolo Prinetto, Zainalabedin Navabi
"Plug & Test" at System Level via Testable TLM Primitives. ITC (2008)
Fatemeh Refan, Homa Alemzadeh, Saeed Safari, Paolo Prinetto, Zainalabedin Navabi
Reliability in Application Specific Mesh-Based NoC Architectures. IOLTS (2008)
Alireza Aminlou, Fatemeh Refan, Maryam Homayouni, Omid Fatemi, Mahmoud Reza Hashemi
A Split Method for Optimized Cost-Quality Hardware Implementation of Lifting-Based Discrete Wavelet Transform. ICASSP (2) (2007)
Alireza Aminlou, Fatemeh Refan, Mahmoud Reza Hashemi, Omid Fatemi
Two Level Cost-Quality Optimization of 9-7 Lifting-Based Discrete Wavelet Transform. ICIP (6) (2007)