• search
    search
  • reviewers
    reviewers
  • feeds
    feeds
  • assignments
    assignments
  • settings
  • logout

A cost-error optimized architecture for 9/7 lifting based Discrete Wavelet Transform with balanced pipeline stages.

Alireza AminlouFatemeh RefanMahmoud Reza HashemiOmid FatemiSaeed Safari
Published in: ICASSP (2009)
Keyphrases