Ernst G. Ulrich

Publication Activity (10 Years)

Years Active: 1965-1993
Publications (10 Years): 0

Publications

Rahul Razdan, Gabriel P. Bischoff, Ernst G. Ulrich
Clock suppression techniques for synchronous circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (10) (1993)
Ernst G. Ulrich, Karen Lentz, Jack H. Arabian, Michael Gustin, Vishwani D. Agrawal, Pier Luca Montessoro
The Comparative and Concurrent Simulation of discrete-event experiments. J. Electron. Test. 3 (2) (1992)
Ernst G. Ulrich, Karen Panetta Lentz, Stephen R. Demba, Rahul Razdan
Concurrent MIN-MAX simulation. EURO-DAC (1991)
Stephen R. Demba, Ernst G. Ulrich, Karen Panetta Lentz, David Giramma
Experiences with concurrent fault simulation of diagnostic programs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (6) (1990)
Rahul Razdan, Gabriel P. Bischoff, Ernst G. Ulrich
Exploitation of Periodicity in Logic Simulation of Synchronous Circuits. ICCAD (1990)
Deborah Machlin, David Gross, Sudhir Kadkade, Ernst G. Ulrich
Switch-Level Concurrent Fault Simulation Based on a General Purpose List Traversal Mechanism. ITC (1988)
Stephen R. Demba, Ernst G. Ulrich, Karen Panetta, David Giramma
Experiences with Concurrent Fault Simulation of Diagnostic Programs. ITC (1988)
Silvano Gai, Fabio Somenzi, Ernst G. Ulrich
Advances in Concurrent Multilevel Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6 (6) (1987)
Ernst G. Ulrich
Concurrent Simulation at the Switch, Gate, and Register Levels. ITC (1985)
Ernst G. Ulrich
A design verification methodology based on concurrent simulation and clock suppression. DAC (1983)
Ernst G. Ulrich, Dennis Hebert
Speed and accuracy in digital network simulation based on structural modeling. DAC (1982)
Ernst G. Ulrich
Table lookup techniques for fast and flexible digital logic simulation. DAC (1980)
Ernst G. Ulrich, D. Lacy, N. Phillips, J. Tellier, M. Kearney, T. Elkind, R. Beaven
High-speed concurrent fault simulation with vectors and scalars. DAC (1980)
Ernst G. Ulrich
Event Manipulation for Discrete Simulations Requiring Large Numbers of Events. Commun. ACM 21 (9) (1978)
Donald M. Schuler, Ernst G. Ulrich, Thomas E. Baker, Susan P. Bryant
Random test generation using concurrent logic simulation. DAC (1975)
Ernst G. Ulrich, Thomas E. Baker
Concurrent simulation of nearly identical digital networks. Computer 7 (4) (1974)
Ernst G. Ulrich, Thomas E. Baker
The concurrent simulation of nearly identical digital networks. DAC (1973)
Ernst G. Ulrich, Thomas E. Baker, L. R. Williams
Fault-test analysis techniques based on logic simulation. DAC (1972)
Donald M. Schuler, Ernst G. Ulrich
Clustering and linear placement. DAC (1972)
Ernst G. Ulrich
Exclusive simulation of activity in digital networks. Commun. ACM 12 (2) (1969)
Ernst G. Ulrich
Serial/parallel event scheduling for the simulation of large systems. ACM National Conference (1968)
Ernst G. Ulrich
Programming languages for non-numeric processing - 2: Time sequenced logical simulation based on circuit delay and selective tracing of active network paths. ACM National Conference (1965)