Don Weiss

Publication Activity (10 Years)

Years Active: 1994-2011
Publications (10 Years): 0

Publications

Don Weiss, Michael Dreesen, Michael Ciraula, Carson Henrion, Chris Helt, Ryan Freese, Tommy Miles, Anita Karegar, Russell Schreiber, Bryan Schneller, John Wuu
An 8MB level-3 cache in 32nm SOI with column-select aliasing. ISSCC (2011)
Anant Singh, Michael Ciraula, Don Weiss, John Wuu, Philippe Bauser, Paul de Champs, Hamid Daghighian, David Fisch, Philippe Graber, Michel Bron
A 2ns-read-latency 4Mb embedded floating-body memory macro in 45nm SOI technology. ISSCC (2009)
Don Weiss, John J. Wuu, Victor Chin
The on-chip 3-MB subarray-based third-level cache on an Itanium microprocessor. IEEE J. Solid State Circuits 37 (11) (2002)
Dave Hollenbeck, Steven R. Undy, Leith Johnson, Don Weiss, Paul Tobin, Richard Carlson
PA7300LC Integrates Cache for Cost/Performance. COMPCON (1996)
Tom Spencer, Frank Lettang, Curtis McAllister, Tony Riccio, Joe Orth, Don Weiss, Brian Arnold
A Workstation I/O System on a Chip. COMPCON (1994)