Derui Kong

Publication Activity (10 Years)

Years Active: 2006-2023
Publications (10 Years): 8

Top Topics

Renewable Energy

Adaptive Filter

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Kangan Wang, Jianglin Xu, Siyu Wu, Derui Kong, Yixian Qu, Weimin Wu
Topology and Operation Analysis of Hybrid DC/DC Converters with Bidirectional Asymmetric Power Flow. IECON (2023)
Kangan Wang, Junchen Wu, Siyu Wu, Yixian Qu, Derui Kong, Weimin Wu
Hybrid DC Solid-State Transformer with Bidirectional Asymmetric Power Flow for Low-Penetration Renewable Energy Systems. IECON (2023)
Derui Kong, Ian Galton
MSE Analysis of a Multi-Loop LMS Pseudo-Random Noise Canceler for Mixed-Signal Circuit Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2020)
Derui Kong, Ian Galton
Subsampling Mismatch Noise Cancellation for High-Speed Continuous-Time DACs. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2019)
Derui Kong, Kevin Rivas-Rivera, Ian Galton
A 600-MS/s DAC With Over 87-dB SFDR and 77-dB Peak SNDR Enabled by Adaptive Cancellation of Static and Dynamic Mismatch Error. IEEE J. Solid State Circuits 54 (8) (2019)
Derui Kong, Ian Galton
Adaptive Cancellation of Static and Dynamic Mismatch Error in Continuous-Time DACs. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2018)
Sang Min Lee, Namsoo Kim, Derui Kong, Dongwon Seo
A DAC With an Impedance Attenuator and Distortion Analysis Using Volterra Series. IEEE Trans. Very Large Scale Integr. Syst. 25 (10) (2017)
Derui Kong, Dongwon Seo, Sang Min Lee
Analysis and Reduction of Nonidealities in Stacked-Transistor Current Sources. IEEE Trans. Very Large Scale Integr. Syst. 25 (2) (2017)
Derui Kong, Sang Min Lee, Shahin Mehdizad Taleie, Michael Joseph McGowan, Dongwon Seo
A linear transconductance amplifier with differential-mode bandwidth extension and common-mode compensation. CICC (2015)
Sang Min Lee, Dongwon Seo, Shahin Mehdizad Taleie, Derui Kong, Michael Joseph McGowan, Tongyu Song, Ganesh R. Saripalli, Jenny Kuo, Seyfi S. Bazarjani
A 14b 750MS/s DAC in 20nm CMOS with <-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture. VLSIC (2015)
Yunfeng Peng, Derui Kong, Feng Zhou
A Low-Voltage Sampling Switch with Improved Linearity. CCECE (2006)