​
Login / Signup
Dengjie Wang
ORCID
Publication Activity (10 Years)
Years Active: 2017-2022
Publications (10 Years): 6
Top Topics
Cmos Technology
Gaze Estimation
Low Cost
Coloured Petri Nets
Top Venues
MWSCAS
IEEE Trans. Circuits Syst. I Regul. Pap.
ASICON
ICTA
</>
Publications
</>
Dengjie Wang
,
Ziqiang Wang
,
Hao Xu
,
Jiawei Wang
,
Zeliang Zhao
,
Chun Zhang
,
Zhihua Wang
,
Hong Chen
A 56-Gbps PAM-4 Wireline Receiver With 4-Tap Direct DFE Employing Dynamic CML Comparators in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
69 (3) (2022)
Zeliang Zhao
,
Xin Wu
,
Dengjie Wang
,
Ziqiang Wang
,
Chun Zhang
,
Xiangyu Li
,
Zhihua Wang
A 40 Gbps PAM-4 Receiver with 12-Tap Direct Decision Feedback Equalizer Employing 1.5-stage Slicers in 65-nm CMOS.
ICTA
(2021)
Hong Chen
,
Dengjie Wang
,
Ziqiang Wang
,
Shuai Yuan
,
Chun Zhang
,
Zhihua Wang
An 11.05 mW/Gbps Quad-Channel 1.25-10.3125 Gbps Serial Transceiver With a 2-Tap Adaptive DFE and a 3-Tap Transmit FFE in 40 nm CMOS.
IEEE Access
9 (2021)
Dengjie Wang
,
Hong Chen
,
Wenhuan Luan
,
Xin Lin
,
Fangxu Lv
,
Ziqiang Wang
,
Hanjun Jiang
,
Chun Zhang
,
Zhihua Wang
A 4-40 Gb/s PAM-4 transmitter with a hybrid driver in 65 nm CMOS technology.
MWSCAS
(2019)
Wenhuan Luan
,
Ting Chen
,
Shuai Yuan
,
Peijie Li
,
Ziqiang Wang
,
Xin Lin
,
Mao Li
,
Dengjie Wang
,
Hong Chen
A 47mW Two-Dimensional Eye Opening Monitor for Multi-Protocol SerDes.
MWSCAS
(2018)
Fangxu Lv
,
Jianye Wang
,
Dengjie Wang
,
Yongcong Liu
,
Ziqiang Wang
Design of 56 Gb/s PAM4 wire-line receiver with ring VCO based CDR in a 65 nm CMOS technology.
ASICON
(2017)