A 56-Gbps PAM-4 Wireline Receiver With 4-Tap Direct DFE Employing Dynamic CML Comparators in 65 nm CMOS.
Dengjie WangZiqiang WangHao XuJiawei WangZeliang ZhaoChun ZhangZhihua WangHong ChenPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2022)