Debaleena Das

Publication Activity (10 Years)

Years Active: 1997-2000
Publications (10 Years): 0

Publications

Debaleena Das, Nur A. Touba
Reducing test data volume using external/LBIST hybrid test patterns. ITC (2000)
Debaleena Das, Nur A. Touba, Markus Seuring, Michael Gössel
Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes. IOLTW (2000)
Debaleena Das, Nur A. Touba
A Low Cost Approach for Detecting, Locating, and Avoiding Interconnect Faults in FPGA-Based Reconfigurable Systems. VLSI Design (1999)
Debaleena Das, Nur A. Touba
Weight-Based Codes and Their Application to Concurrent Error Detection of Multilevel Circuits. VTS (1999)
Jayabrata Ghosh-Dastidar, Debaleena Das, Nur A. Touba
Fault diagnosis in scan-based BIST using both time and space information. ITC (1999)
Debaleena Das, Nur A. Touba
Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes. J. Electron. Test. 15 (1-2) (1999)
Debaleena Das, Nur A. Touba
Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes. VTS (1998)
Debaleena Das, Mark G. Karpovsky
Exhaustive and Near-Exhaustive Memory Testing Techniques and their BIST Implementations. J. Electron. Test. 10 (3) (1997)