Dae Hyun Kwon

Publication Activity (10 Years)

Years Active: 2009-2021
Publications (10 Years): 10

Top Topics

Cmos Technology

Wireless Transmission

Metal Oxide Semiconductor

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Minkyu Kim, Dae Hyun Kwon, Daewon Rho, Woo-Young Choi
A Low-Power 28-Gb/s PAM-4MZM Driver With Level Pre-Distortion. IEEE Trans. Circuits Syst. II Express Briefs 68 (3) (2021)
Dae Hyun Kwon, Minkyu Kim, Sung-Geun Kim, Woo-Young Choi
A Low-Power 40-Gb/s Pre-Emphasis PAM-4 Transmitter With Toggling Serializers. IEEE Trans. Circuits Syst. II Express Briefs (3) (2020)
Dae Hyun Kwon, Minkyu Kim, Sung-Geun Kim, Woo-Young Choi
A 32-Gb/s PAM-4 Quarter-Rate Clock and Data Recovery Circuit With an Input Slew-Rate Tolerant Selective Transition Detector. IEEE Trans. Circuits Syst. II Express Briefs (2) (2019)
Qing Liu, Dae Hyun Kwon, Quang-Diep Bui, Jeong-Hyun Choi, Jaehun Lee, Sanghyun Baek, Seungchan Heo, Thomas Byunghak Cho
A 1.4-to-2.7GHz high-efficiency RF transmitter with an automatic 3FLO-suppression tracking-notch-filter mixer supporting HPUE in 14nm FinFET CMOS. ISSCC (2018)
Venumadhav Bhagavatula, Dae Hyun Kwon, Jaehun Lee, Quang-Diep Bui, Jeong-Hyun Choi, Siuchuang-Ivan Lu, Sang Won Son
13.3 A SAW-less reconfigurable multimode transmitter with a voltage-mode harmonic-reject mixer in 14nm FinFET CMOS. ISSCC (2017)
Sung-Geun Kim, Tongsung Kim, Dae Hyun Kwon, Woo-Young Choi
A 5-8 Gb/s low-power transmitter with 2-tap pre-emphasis based on toggling serialization. A-SSCC (2016)
Sung-Geun Kim, Jinsoo Rhim, Dae Hyun Kwon, Min-Hyeong Kim, Woo-Young Choi
A Low-Voltage PLL With a Supply-Noise Compensated Feedforward Ring VCO. IEEE Trans. Circuits Syst. II Express Briefs (6) (2016)
Ki-Hyun Pyun, Dae Hyun Kwon, Woo-Young Choi
A 3.5/7.0/14-Gb/s multi-rate clock and data recovery circuit with a multi-mode rotational binary phase detector. APCCAS (2016)
Siddharth Seth, Dae Hyun Kwon, Sriramkumar Venugopalan, Sang Won Son, Yongrong Zuo, Venumadhav Bhagavatula, Jaehyun Lim, Dongjin Oh, Thomas Byunghak Cho
A Dynamically Biased Multiband 2G/3G/4G Cellular Transmitter in 28 nm CMOS. IEEE J. Solid State Circuits 51 (5) (2016)
Dae Hyun Kwon, Young-Seok Park, Woo-Young Choi
A clock and data recovery circuit with programmable multi-level phase detector characteristics and a built-in jitter monitor. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2015)
Joung-Wook Moon, Sung-Geun Kim, Dae Hyun Kwon, Woo-Young Choi
A 0.4-V, 500-MHz, ultra-low-power phase-locked loop for near-threshold voltage operation. CICC (2014)
Richard Tseng, Hao Li, Dae Hyun Kwon, Yun Chiu, Ada S. Y. Poon
A Four-Channel Beamforming Down-Converter in 90-nm CMOS Utilizing Phase-Oversampling. IEEE J. Solid State Circuits 45 (11) (2010)
Dae Hyun Kwon, Hao Li, Yuchun Chang, Richard Tseng, Yun Chiu
Digitally Equalized CMOS Transmitter Front-End With Integrated Power Amplifier. IEEE J. Solid State Circuits 45 (8) (2010)
Dae Hyun Kwon, Hao Li, Yuchun Chang, Richard Tseng, Yun Chiu
CMOS RF transmitter with integrated power amplifier utilizing digital equalization. CICC (2009)
Hao Li, Dae Hyun Kwon, Deming Chen, Yun Chiu
A Fast Digital Predistortion Algorithm for Radio-Frequency Power Amplifier Linearization With Loop Delay Compensation. IEEE J. Sel. Top. Signal Process. 3 (3) (2009)