Chung-Ju Wu

Publication Activity (10 Years)

Years Active: 2005-2014
Publications (10 Years): 0

Top Topics

Digital Signal Processor

Top Venues

J. Supercomput.

Concurr. Comput. Pract. Exp.

Publications

Chung-Ju Wu, Chia-Han Lu, Jenq Kuen Lee
Register spilling via transformed interference equations for PAC DSP architecture. Concurr. Comput. Pract. Exp. 26 (3) (2014)
Chia-Han Lu, Wen-Li Shih, Chung-Ju Wu, Jenq Kuen Lee
Achieving spilling-friendly register file assignment for highly distributed register files. J. Supercomput. 69 (3) (2014)
Chung-Ju Wu, Yu-Te Lin, Jenq Kuen Lee
Instruction scheduling methods and phase ordering framework for VLIW DSP processors with distributed register files. J. Supercomput. 61 (3) (2012)
David Chih-Wei Chang, Tay-Jyi Lin, Chung-Ju Wu, Jenq Kuen Lee, Yuan-Hua Chu, An-Yeu Wu
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools. J. Signal Process. Syst. 62 (3) (2011)
Chung-Wen Huang, Wen-Li Shih, Chung-Ju Wu, Jia-Jhe Li, Jenq Kuen Lee
Programming model and tools for embedded multicore systems. Int. J. Embed. Syst. 4 (3/4) (2010)
Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin Tang, Yi-Ping You, Ya-Chiao Moo, Jenq Kuen Lee
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores. J. Signal Process. Syst. 51 (3) (2008)
Chung-Ju Wu, Sheng-Yuan Chen, Jenq Kuen Lee
Copy Propagation Optimizations for VLIW DSP Processors with Distributed Register Files. LCPC (2006)
Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu, Wen-Li Shih, Shih-Chang Chen, Chung-Kai Chen, Chien-Ching Huang, Yi-Ping You, Jenq Kuen Lee
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors. RTCSA (2006)
Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen, Jenq Kuen Lee
Compiler Supports and Optimizations for PAC VLIW DSP Processors. LCPC (2005)