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Chia-Han Lu
Publication Activity (10 Years)
Years Active: 2007-2016
Publications (10 Years): 1
Top Topics
Linear Hashing
Digital Signal Processor
Dynamically Changing
Systolic Array
Top Venues
Concurr. Comput. Pract. Exp.
ISCAS
J. Supercomput.
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Publications
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Yun-Chi Huang
,
Kuan-Chieh Hsu
,
Wan-shan Hsieh
,
Chen-Chieh Wang
,
Chia-Han Lu
,
Chung-Ho Chen
Dynamic SIMD re-convergence with paired-path comparison.
ISCAS
(2016)
Chung-Ju Wu
,
Chia-Han Lu
,
Jenq Kuen Lee
Register spilling via transformed interference equations for PAC DSP architecture.
Concurr. Comput. Pract. Exp.
26 (3) (2014)
Chia-Han Lu
,
Wen-Li Shih
,
Chung-Ju Wu
,
Jenq Kuen Lee
Achieving spilling-friendly register file assignment for highly distributed register files.
J. Supercomput.
69 (3) (2014)
Chia-Han Lu
,
Yung-Chia Lin
,
Yi-Ping You
,
Jenq Kuen Lee
LC-GRFA: global register file assignment with local consciousness for VLIW DSP processors with non-uniform register files.
Concurr. Comput. Pract. Exp.
21 (1) (2009)
Yung-Chia Lin
,
Chia-Han Lu
,
Chung-Ju Wu
,
Chung-Lin Tang
,
Yi-Ping You
,
Ya-Chiao Moo
,
Jenq Kuen Lee
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores.
J. Signal Process. Syst.
51 (3) (2008)
Chung-Kai Chen
,
Ling-Hua Tseng
,
Shih-Chang Chen
,
Young-Jia Lin
,
Yi-Ping You
,
Chia-Han Lu
,
Jenq Kuen Lee
Enabling compiler flow for embedded VLIW DSP processors with distributed register files.
LCTES
(2007)