Chihiro Matsui

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 35

Top Topics

Annealing Algorithm

Foreseeable Future

Top Venues

IEICE Trans. Electron.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Chihiro Matsui, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi
FeFET Local Multiply and Global Accumulate Voltage-Sensing Computation-In-Memory Circuit Design for Neuromorphic Computing. IEEE Trans. Very Large Scale Integr. Syst. 32 (3) (2024)
Naoko Misawa, Tao Wang, Chihiro Matsui, Ken Takeuchi
Embedded Transformer Hetero-CiM: SRAM CiM for 4b Read/Write-MAC Self-attention and MLC ReRAM CiM for 6b Read-MAC Linear&FC Layers. IMW (2024)
Takuto Nishimura, Yuya Ichikawa, Akira Goda, Naoko Misawa, Chihiro Matsui, Ken Takeuchi
Stochastic Computing-based Computation-in-Memory (SC CiM) Architecture for DNNs and Hierarchical Evaluations of Non-volatile Memory Error and Defect Tolerance. IMW (2023)
Shinsei Yoshikiyo, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Chihiro Matsui, Ken Takeuchi
Write Variation & Reliability Error Compensation by Layer-Wise Tunable Retraining of Edge FeFET LM-GA CiM. IEICE Trans. Electron. 106 (7) (2023)
Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi
ReRAM CiM Fluctuation Pattern Classification by CNN Trained on Artificially Created Dataset. IRPS (2023)
Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi
LIORAT: NN Layer I/O Range Training for Area/Energy-Efficient Low-Bit A/D Conversion System Design in Error-Tolerant Computation-in-Memory. ICCAD (2023)
Chihiro Matsui, Ken Takeuchi
Heterogeneous Integration of Precise and Approximate Storage for Error-Tolerant Workloads. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106 (3) (2023)
Yuya Ichikawa, Akira Goda, Chihiro Matsui, Ken Takeuchi
Non-volatile Memory Application to Quantum Error Correction with Non-uniformly Quantized CiM. IMW (2022)
Chihiro Matsui, Eitaro Kobayashi, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi
Versatile FeFET Voltage-sensing Analog CiM for Fast & Small-area Hyperdimensional Computing. ISCAS (2022)
Shinsei Yoshikiyo, Naoko Misawa, Chihiro Matsui, Ken Takeuchi
Edge Computation-in-Memory for In-situ Class-incremental Learning with Knowledge Distillation. ISCAS (2022)
Naoko Misawa, Kenta Taoka, Chihiro Matsui, Ken Takeuchi
Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing. ISCAS (2022)
Shinsei Yoshikiyo, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Chihiro Matsui, Ken Takeuchi
Edge Retraining of FeFET LM-GA CiM for Write Variation & Reliability Error Compensation. IMW (2022)
Kenta Taoka, Naoko Misawa, Shunsuke Koshino, Chihiro Matsui, Ken Takeuchi
Simulated Annealing Algorithm & ReRAM Device Co-optimization for Computation-in-Memory. IMW (2021)
Chihiro Matsui, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi
Energy-Efficient Reliable HZO FeFET Computation-in-Memory with Local Multiply & Global Accumulate Array for Source-Follower & Charge-Sharing Voltage Sensing. VLSI Circuits (2021)
Mamoru Fukuchi, Shun Suzuki, Kyosuke Maeda, Chihiro Matsui, Ken Takeuchi
BER Evaluation System Considering Device Characteristics of TLC and QLC NAND Flash Memories in Hybrid SSDs with Real Storage Workloads. ISCAS (2021)
Mamoru Fukuchi, Chihiro Matsui, Ken Takeuchi
System Performance Comparison of 3D Charge-Trap TLC NAND Flash and 2D Floating-Gate MLC NAND Flash Based SSDs. IEICE Trans. Electron. (4) (2020)
Yoshiki Kakuta, Reika Kinoshita, Hiroshi Kinoshita, Chihiro Matsui, Ken Takeuchi
Real-time Error Monitoring System Considering Endurance and Data-retention Characteristics of TaOX-based ReRAM Storage with Workloads at Data Centers. VLSI-DAT (2020)
Yoshiki Takai, Mamoru Fukuchi, Chihiro Matsui, Reika Kinoshita, Ken Takeuchi
Analysis on Hybrid SSD Configuration with Emerging Non-Volatile Memories Including Quadruple-Level Cell (QLC) NAND Flash Memory and Various Types of Storage Class Memories (SCMs). IEICE Trans. Electron. (4) (2020)
Reika Kinoshita, Chihiro Matsui, Atsuya Suzuki, Shouhei Fukuyama, Ken Takeuchi
Workload-aware Data-eviction Self-adjusting System of Multi-SCM Storage to Resolve Trade-off between SCM Data-retention Error and Storage System Performance. ASP-DAC (2020)
Chihiro Matsui, Ken Takeuchi
Self-Determining Resource Control in Multi-Tenant Data Center Storage with Future NV Memories. ISCAS (2019)
Chihiro Matsui, Ken Takeuchi
Design of heterogeneously-integrated memory system with storage class memories and NAND flash memories. ASP-DAC (2019)
Chihiro Matsui, Ken Takeuchi
Dynamic Adjustment of Storage Class Memory Capacity in Memory-Resource Disaggregated Hybrid Storage With SCM and NAND Flash Memory. IEEE Trans. Very Large Scale Integr. Syst. 27 (8) (2019)
Chihiro Matsui, Ken Takeuchi
Step-by-Step Design of memory hierarchy for heterogeneously-integrated SCM/NAND flash storage. Integr. 69 (2019)
Mamoru Fukuchi, Yukiya Sakaki, Chihiro Matsui, Ken Takeuchi
20% System-performance Gain of 3D Charge-trap TLC NAND Flash over 2D Floating-gate MLC NAND Flash for SCM/NAND Flash Hybrid SSD. ISCAS (2018)
Atsuya Suzuki, Chihiro Matsui, Ken Takeuchi
Periodic Data Eviction Algorithm of SCM/NAND Flash Hybrid SSD with SCM Retention Time Constraint Capabilities at Extremely High Temperature. NVMTS (2018)
Hirofumi Takishita, Yutaka Adachi, Chihiro Matsui, Ken Takeuchi
Analysis of SCM-Based SSD Performance in Consideration of SCM Access Unit Size, Write/Read Latencies and Application Request Size. IEICE Trans. Electron. (4) (2018)
Yusuke Yamaga, Chihiro Matsui, Yukiya Sakaki, Ken Takeuchi
Reliability Analysis of Scaled NAND Flash Memory Based SSDs with Real Workload Characteristics by Using Real Usage-Based Precise Reliability Test. IEICE Trans. Electron. (4) (2018)
Chihiro Matsui, Ken Takeuchi
3ASCA: Application-Aware Autonomous SCM Capacity Adjustment for SCM and NAND Flash Pooled Storage. ISCAS (2018)
Yutaka Adachi, Chihiro Matsui, Ken Takeuchi
Double asymmetric-latency storage class memories (SCMs) for fast-write SCM, fast-read SCM & NAND flash hybrid SSDs. VLSI-DAT (2018)
Reika Kinoshita, Chihiro Matsui, Shinpei Matsuda, Yutaka Adachi, Ken Takeuchi
Maximizing Peformance/cost Figure of Merit of Storage-type SCM based SSD by Adding Small Capacity of Memory-type SCM. NVMTS (2018)
Chihiro Matsui, Asuka Arakawa, Chao Sun, Ken Takeuchi
Write Order-Based Garbage Collection Scheme for an LBA Scrambler Integrated SSD. IEEE Trans. Very Large Scale Integr. Syst. 25 (2) (2017)
Chihiro Matsui, Chao Sun, Ken Takeuchi
Design of Hybrid SSDs With Storage Class Memory and NAND Flash Memory. Proc. IEEE 105 (9) (2017)
Tomoaki Yamada, Chihiro Matsui, Ken Takeuchi
Workload-Based Co-Design of Non-Volatile Cache Algorithm and Storage Class Memory Specifications for Storage Class Memory/NAND Flash Hybrid SSDs. IEICE Trans. Electron. (4) (2017)
Chihiro Matsui, Ken Takeuchi
22% Higher performance, 2x SCM write endurance heterogeneous storage with dual storage class memory and NAND flash. ESSDERC (2017)
Chao Sun, Ayumi Soga, Chihiro Matsui, Asuka Arakawa, Ken Takeuchi
LBA Scrambler: A NAND Flash Aware Data Management Scheme for High-Performance Solid-State Drives. IEEE Trans. Very Large Scale Integr. Syst. 24 (1) (2016)