Chiakang Sung

Publication Activity (10 Years)

Years Active: 1998-2005
Publications (10 Years): 0

Publications

Jeffrey Tyhach, Bonnie Wang, Chiakang Sung, Joseph Huang, Khai Nguyen, Xiaobao Wang, Yan Chong, Philip Pan, Henry Kim, Gopinath Rangan, Tzung-Chin Chang, Johnson Tan
A 90-nm FPGA I/O buffer design with 1.6-Gb/s data rate for source-synchronous system and 300-MHz clock rate for external memory interface. IEEE J. Solid State Circuits 40 (9) (2005)
Jeffrey Tyhach, Bonnie Wang, Chiakang Sung, Joseph Huang, Khai Nguyen, Xiaobao Wang, Yan Chong, Philip Pan, Henry Kim, Gopinath Rangan, Tzung-Chin Chang, Johnson Tan
A 90 nm FPGA I/O buffer design with 1.6 Gbps data rate for source-synchronous system and 300 MHz clock rate for external memory interface. CICC (2004)
Sammy Cheung, Kar Keng Chua, Boon Jin Ang, Thow Pang Chong, Wei Lian Goay, Wei Yee Koay, Sin Wo Kuan, Chooi Pei Lim, Jiunn Shyong Oon, Theam Thye See, Chiakang Sung, Kim Pin Tan, Yu Fong Tan, Choong Kit Wong
A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM. CICC (2000)
Chiakang Sung, Richard Cliff, Joseph Huang, Bonnie Wang, Khai Nguyen, Xtaobao Wang, Kerry Veenstra, Bruce Pedersen, John Turner
A silicon efficient FLEX 6000 programmable logic architecture. CICC (1998)
Kerry Veenstra, Bruce Pedersen, Jay Schleicher, Chiakang Sung
Optimizations for a Highly Cost-Efficient Programmable Logic Architecture. FPGA (1998)