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A 90-nm FPGA I/O buffer design with 1.6-Gb/s data rate for source-synchronous system and 300-MHz clock rate for external memory interface.

Jeffrey TyhachBonnie WangChiakang SungJoseph HuangKhai NguyenXiaobao WangYan ChongPhilip PanHenry KimGopinath RanganTzung-Chin ChangJohnson Tan
Published in: IEEE J. Solid State Circuits (2005)
Keyphrases
  • high speed
  • data structure
  • external memory
  • database
  • internal memory
  • data sources
  • data points
  • memory space
  • storage systems
  • memory access
  • management system
  • power consumption
  • main memory