Login / Signup
Chandrajit Debnath
Publication Activity (10 Years)
Years Active: 2007-2017
Publications (10 Years): 2
Top Topics
Silicon On Insulator
Wavelet Decomposition
Brain Activity
Single Channel
Top Venues
ESSCIRC
IEEE J. Solid State Circuits
</>
Publications
</>
Ashish Kumar
,
Chandrajit Debnath
,
Pratap Narayan Singh
,
Vivek Bhatia
,
Shivani Chaudhary
,
Vigyan Jain
,
Stéphane Le Tual
,
Rakesh Malik
19.8-mW Single-Channel Calibration-Free 12-b 600-MS/s ADC in 28-nm UTBB FD-SOI Using FBB.
IEEE J. Solid State Circuits
52 (7) (2017)
Ashish Kumar
,
Chandrajit Debnath
,
Pratap Narayan Singh
,
Vivek Bhatia
,
Shivani Chaudhary
,
Vigyan Jain
,
Stéphane Le Tual
,
Rakesh Malik
19.8mW single channel calibration-free 12b 600MS/s ADC in 28nm UTBB FDSOI using FBB.
ESSCIRC
(2016)
Arunkumar Salimath
,
Chandrajit Debnath
,
Kallol Chatterjee
,
Sushanta K. Mandal
A 6 bit 800MHz TIADC Based on Successive Approximation in 65nm Standard CMOS Process.
VLSI Design
(2010)
Pratap Narayan Singh
,
Ashish Kumar
,
Chandrajit Debnath
,
Rakesh Malik
A 1.2v 11b 100Msps 15mW ADC realized using 2.5b pipelined stage followed by time interleaved SAR in 65nm digital CMOS process.
CICC
(2008)
Pratap Narayan Singh
,
Ashish Kumar
,
Chandrajit Debnath
,
Rakesh Malik
20mW, 125 Msps, 10 bit Pipelined ADC in 65nm Standard Digital CMOS Process.
CICC
(2007)