Arunkumar Salimath

Publication Activity (10 Years)

Years Active: 2010-2022
Publications (10 Years): 6

Top Topics

Dc Dc Converter

Transient Response

Operating Conditions

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Waqar Ahmed Qureshi, Arunkumar Salimath, Edoardo Botti, Franco Maloberti, Edoardo Bonizzoni
An Incremental-ΔΣ ADC With 106-dB DR for Reconfigurable Class-D Audio Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Arunkumar Salimath, Edoardo Botti, Giovanni Gonano, Paolo Cacciagrano, Davide Luigi Brambilla, Tommaso Barbieri, Franco Maloberti, Edoardo Bonizzoni
SIMO DC-DC Converter Embedded in a Car-Radio IC. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2019)
Arunkumar Salimath, Giovanni Gonano, Edoardo Bonizzoni, Davide Luigi Brambilla, Edoardo Botti, Franco Maloberti
Design Considerations for Integrated, High-Voltage DC-DC Converters. ISCAS (2018)
Filippo Boera, Arunkumar Salimath, Edoardo Bonizzoni, Franco Maloberti
Design of a SIBO DC-DC Converter for AMOLED Display Driving. PRIME (2018)
Arunkumar Salimath, Edoardo Bonizzoni, Edoardo Botti, Giovanni Gonano, Paolo Cacciagrano, Davide Luigi Brambilla, Tommaso Barbieri, Franco Maloberti
An 86% efficiency SIMO DC-DC converter with one boost, one buck, and a floating output voltage for car-radio. ISSCC (2018)
Arunkumar Salimath, Giovanni Gonano, Edoardo Bonizzoni, Davide Luigi Brambilla, Edoardo Botti, Franco Maloberti
A high-speed level shifting technique and its application in high-voltage, synchronous DC-DC converters with quasi-ZVS. ISCAS (2017)
Arunkumar Salimath, Pradeep Karamcheti, Achintya Halder
A 1 V, Sub-mW CMOS LNA for Low-Power 1 GHz Wide-Band Wireless Applications. VLSI Design (2014)
Deepak Kumar Meher, Arunkumar Salimath, Achintya Halder
An Ultra-low Power Symbol Detection Methodology and Its Circuit Implementation for a Wake-up Receiver in Wireless Sensor Nodes. VLSI Design (2012)
Arunkumar Salimath, Chandrajit Debnath, Kallol Chatterjee, Sushanta K. Mandal
A 6 bit 800MHz TIADC Based on Successive Approximation in 65nm Standard CMOS Process. VLSI Design (2010)